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Logic Design > Data Processing Circuits > Flashcards

Data Processing Circuits Flashcards

1
Q

How many inputs does a half adder accept ?

A

2 binary inputs

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2
Q

How many outputs does a half adder produce ?

A

Two. Sum & Carry bit

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3
Q

What is a parallel binary adder ?

A

Two or more connected full adders

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4
Q

What is a nibble ?

A

A group of four bits

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5
Q

What is an application of adders (full and parallel) ?

A

Simple voting system

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6
Q

What does a comparator do ?

A

Compare the magnitude of two binary quantities

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7
Q

What does a encoder do ?

A

Detects presence of a specified combination of bits on its inputs

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8
Q

What are the two main data selection circuits ?

A

MUX and DE- MUX

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9
Q

What does a multiplexer do ?

A

Forwards a selected input into the output line

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10
Q

How many output lines are there in a multiplexer ?

A

One single output line

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11
Q

How does it choose the input signal ?

A

By application of a control signal

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12
Q

If a MUX has n select lines, how many inputs can it take ?

A

2^n

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13
Q

What is the schematic diagram of a multiplexer ?

A

An isosceles trapezium

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14
Q

What does the longer parallel side of the trapezium contain ?

A

Input pins

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15
Q

What does the shorter parallel side of the trapezium contain ?

A

Output pin

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16
Q

What is a demultiplexer ?

A

Data Distributor circuit

17
Q

How many inputs does a demultiplexer have ?

A

One

18
Q

What does a demultiplexer do with this single input ?

A

Switches it to an output line

19
Q

How many output lines get the signal at a time ?

A

Only one

20
Q

How is the output line selected ?

A

Via the Control signal

21
Q

How are a multiplexer and demultiplexer connected together ?

A

The single output of a MUX is connected to the single input

22
Q

How does a multiplexer-demultiplexer combo save cost ?

A

No need of one device per input signal.

Several signals share a device

23
Q

What is a nibble multiplexer ?

A

Selects one of two nibbles(4 bits) at a time

24
Q

Can a large multiplexer be implemented with smaller multiplexers ?

A

Yes. 16-1 can be implemented by two 8-1’s and one 2-1,

And likewise

25
Q

What is the difference in between a demultiplexer and a decoder ?

A

Decoders have on data input

26
Q

What does even parity mean, for n bits ?

A

There are an even number of 1’s

27
Q

What does odd parity mean, for n bits ?

A

There are an odd number of 1’s

Logic Design (7 decks)

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