CPU arch Flashcards

1
Q

Computer hardware consists of……

A

Central Processing Unit (CPU)
Sound Card
Motherboard
Graphics Processing Unit (GPU)
Input & Output devices
Storage units (primary & secondary)

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2
Q

Computer arch designs

A

Von Neumann model
Harvard model

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3
Q

What does Harvard arch have separate memory for?
How is it different from Von Neumann arch?(2)

A

Harvard architecture has separate memory space for data and instruction.

Harvard differs from Von Neumann architecture which employs a single bus to both fetch instructions from memory and transfer data from one part of a computer to another.

Both the concepts are similar except the way they access memory locations

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4
Q

Idea behind Harvard arch?

A

The idea behind the Harvard architecture is to split the memory into two parts:

one for data
one for programs

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5
Q

What is it based on and what does it do?

A

Based on the original Harvard Mark I (1944) relay based computer which employed a system that would allow both data and transfers and instruction fetches to be performed at the same time.

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6
Q

Harvard model

A

…………………………………ALU
Instruction mem<—ControlUnit—>Data mem
………………………………… I/O

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7
Q

Vonneumann model-Who created it?Why?
What did he work on?
What are the components?

A

-Renowned mathematician and physicist John Von Neumann in 1945.
-Able to store instructions in the memory along with the data on which the instructions operate
-Harvard Mark I at IBM
-central processing unit (CPU),memory unit, input/output (I/O) interfaces

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8
Q

3 main components CPU

A

CPU heart of computer system 3 main components:
the Arithmetic and Logic Unit (ALU)
the control unit (CU)
Registers
-Accumulator (ACC)
-Program Counter (PC)
-Instruction Register (IR)
-Memory Address Register (MAR)
-Memory Data Register (MDR)

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9
Q

What do they do?
ALU
CU
Registers
Mem unit
I/O interface

A

*The ALU is responsible - carrying out all arithmetic and logic operations on data.
*The control unit (CU) determines - order of flow of instructions - need executed -> programs -> issuing control signals -> hardware.
*The registers -> temporary storage locations store addresses of the instructions - need executed.
*The memory unit = RAM, which- main memory used to store program data + instructions.
*The I/O interface allows users - communicate with outside world : storage devices.

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10
Q

Buses-What do they do?What are they?
What does the system bus control?

A

Buses transfer the data + instruction locations:
The System bus:
Address bus
Data bus
Control bus
The system bus controls the flow of data through the network

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11
Q

VNM vs Harvard

A

VNM- Theoretical design based->stored program computer concept.
Same memory for data and instructions
Processor-2 clock cycles-execute instruction.
Simpler CU design
Data transfer+instruction fetches X perform same time
Used in personal computers+workstations+laptops
Havard - Modern design - Havard Mark 1
Seperate memory address- data+instructions.
Processor-1clock cycle-execute instruction
More complicated design -2 separate buses
Data transfer+instructions fetches peform same time
Used - microprocessors

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12
Q

CPU

A

Computing equivalent of the human brain
main component -> computer, processing all the data and instructions

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13
Q

CPU components

A

CU
ALU
Internal mem
Registers
Buses

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14
Q

CU

A

Supervises FDE cycle
Sends + receives signals from all parts of the computer
Ensures processes are completed in the correct order

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15
Q

ALU

A

Processes + manipulates data
Performs simple calculations
Carries out logical operations

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16
Q

Internal mem

A

Known - cache memory (level 1)
Fast access temporary storage on the CPU
Data is moved from the cache to internal memory when not being used

17
Q

Registers

A

Current Instruction Register (CIR)
-Stores the instruction that is currently being used by the CPU
Program Counter (PC)
-Stores the memory location of the next required instruction
Accumulator (ACC)
-Stores the results of the calculations made by the ALU
Memory Address Register (MAR)
-Stores the memory address location where data is currently being read/written
Memory Data Register (MDR)
-Stores the data currently being read/written

18
Q

Buses

A

->printed circuits -> motherboard - connect components: I/O devices to the CPU + other parts of a computer:
Address Bus–Sends info about where data needs to go -> sending an address to the memory. Only sends data in 1 direction
Data Bus–Sends data to/from memory. Data flow either direction along - data bus
Control Bus–Carries commands from CPU and returns status signals from the device currently in use

19
Q

FDE cycle

A

-The processor checks program counter-which instruction to run next.
-The program counter gives address value-> memory of where next instruction is.
-The processor fetches instruction value-> memory location
-Once instruction fetched needs- decoded+executed.
-The control unit checks instruction-> instruction register. Instruction - decoded to determine action - needs -carried out
-The action being executed -depended-> action being carried out
-Once- complete, processor goes back-program counter find next instruction.
-Cycle rep until program completed.