Conditional Execution

Question 1

A beneficial feature of the ARM architecture is that instructions can be made to execute conditionally. This is common in other architectures’ branch or jump instructions but ARM allows its use with most mnemonics.

Answer 1

A beneficial feature of the ARM architecture is that instructions can be made to execute conditionally. This is common in other architectures’ branch or jump instructions but ARM allows its use with most mnemonics.

Question 2

The condition is specified with a two-letter suffix, such as __ or __, appended to the mnemonic. The condition is tested against the current processor flags and if not met the instruction is treated as a __-__. This feature often removes the need to branch, avoiding pipeline stalls and increasing speed. It can also increase code density.

Answer 2

The condition is specified with a two-letter suffix, such as EQ or CC, appended to the mnemonic. The condition is tested against the current processor flags and if not met the instruction is treated as a no-op. This feature often removes the need to branch, avoiding pipeline stalls and increasing speed. It can also increase code density.

Question 3

By default the data processing instructions do not affect the condition code flags but can be made to by suffixing S. The comparison instructions CMP, TST, and co. do this implicitly.

Answer 3

By default the data processing instructions do not affect the condition code flags but can be made to by suffixing S. The comparison instructions CMP, TST, and co. do this implicitly.

Question 4

Examples

What does the following code fragment do?

MOV r1, #10 loop ... SUBS r1, r1, #1 BNE loop

Answer 4

Examples

The following code fragment is a loop which runs until the counter in R1 hits zero, at which point the condition code NE(not equal to zero) controlling the branch becomes false.

MOV r1, #10 loop ... SUBS r1, r1, #1 BNE loop

Question 5

Flags

The top end of the program status register looks like this: