Computers: Von Neumann Architecture

Question 1

Explain the FETCH DECODE EXECUTE cycle:

Answer 1

1. The memory address held in the program counter (PC) is copied into the MAR
2. The address in the program counter is then incremented - or increased by one. The program counter now holds the address of the next instruction to be fetched.
3. The processor sends a signal containing the address of the instruction to be fetched along the address bus to the computer’s memory
4. The instruction held in that memory address is sent along the data bus to the MDR
5. The instruction held in the MDR is copied into the CIR
6. The instruction held in the CIR is decoded and executed. The results of processing are stored in the ACC
7. The cycle then returns to step one

Question 2

How are data and instructions stored?

Answer 2

As binary digits

Question 3

Where are data and instructions stored?

Answer 3

In the same RAM

Question 4

How are instructions fetched from the memory?

Answer 4

One at a time and in order

Question 5

What does the MDR stand for and do?

Answer 5

• Memory Data Register
• Holds the contents found at the address held in the MAR, or data which is to be transferred to main memory

Question 6

What is the CIR?

Answer 6

• Current instruction register
• Holds the instruction that is currently being decoded and executed

Question 7

What does the ACC do?

Answer 7

• Accumulator
• Holds the result of processing (FDE)

Question 8

What does the PC do?

Answer 8

Holds the memory address of the next instruction to be fetched from main memory

Question 9

What does the MAR do?

Answer 9

Holds the address of the current instruction that is to be fetched from memory, or the address in memory to which data is to be transferred