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Computer Science (Year 1) > Computers and the Internet > Flashcards

Computers and the Internet Flashcards

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1
Q

When may polling be preferable?

A

Polling may be efficient if:
- The controller and the device are fast
- The I/O rate is high
- Some I/O data can be ignored
- The CPU has nothing better to do

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2
Q

Explain Large Data Transfers in Devices

A

-Some devices (e.g., disk drives) will often do large data transfers
-The transfer will be inefficient if the CPU has to feed data, byte by
byte, to the controller’s registers
- A better approach is to offload this work to a special-purpose
processor (a direct memory access (DMA) controller)

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3
Q

What are device drivers?

A

A device driver hides differences between various device controllers by defining an interface between the OS and I/O devices for a specific class of I/O devices.

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3
Q

What is Direct Memory Access?

A

-The CPU writes command block into memory, specifying source and destination of transfer

-The DMA controller can then perform multiple transfers via a single command

-When the transfer is complete, the CPU receives an interrupt from the DMA controller

-This enables the CPU to spend more resources on other tasks

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4
Q

What are System Calls?

A

A request of a kernel service.

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5
Q

What is a Character I/O

A

(Examples: keyboards, computer mice, microphones, speakers)

  • A character device transfers byte one by one
  • Characters must be processed in order that they arrive in the
    stream
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6
Q

What does Character I/O interface include?

A

The interface includes
- Get operation, to return the next character in the stream
- Put operation, to add character to stream
- Libraries for line-by-line access, with integrated editing services (e.g.,
use back spaces to remove the preceding character from the
stream)

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7
Q

What is Block I/O?

A

Block devices (typically non-volatile mass storage devices) are used to transfer blocks of data.

They are high volume devices

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8
Q

What does Block I/O interface include?

A

The interface includes:
- Read operation, for reading blocks of data
- Write operation, for writing blocks of data

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9
Q

How does does Block I/O access Memory-Mapped Files?

A

Layered on top of block device drivers

Rather read/write, it provides access to disk storage via a location in main memory

The OS deals with transferring data between memory and the device and can perform transfers when needed

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10
Q

What does a network socket interface have system calls for?

A
  • Creating and connecting sockets
  • Sending and receiving packets over the connection
  • Select function, for determining the status of one or more sockets
    (whether the socket is ready for reading or writing )
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11
Q

What is the main difference between network I/O device and other I/O devices?

A

With network I/O devices things routinely go wrong (missing packets, etc.)

Therefore, there need to be a system functions for:
- Checking whether a transfer was successful
- Recovering gracefully from unsuccessful transfers

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12
Q

Define a program

A

A set of instructions for performing a specific task and is stored on a disk (passive)

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13
Q

Define a process

A

An instance of a program, in execution (active) - requires CPU resources, memory and I/O

Multiple process instances of one program

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14
Q

Why use processes?

A

Modularity:
- Simplifies OS development and maintenance

Speedup through Parallelism:
- Execute multiple processes in parallel using multiple CPU cores

Security and Stability through Isolation:
- Usually, each process operates in its own memory space
- Minimize inter-process disruptions – problems in a process may not
affect others

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15
Q

What is a Process Control Block (PCB) ?

A

A PCB is a data structures that stores all the information about a process
- Kernel’s representation of a process

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16
Q

How does Context Switching work?

A

Stop running process 1 and start process 2:
- Change the state of process 1 from running to ready
- Save the context of process 1
- Load the context of process 2
- Change the process scheduling state of process 2

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17
Q

What is the tradeoff of Context Switches?

A

With too few context switches
- No fairness between processes – some processes may have to wait for a long time

With too many context switches
- The processor will spend too much resources on overhead

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18
Q

Key info about the stack structure

A

LIFO structure

Operations: Push and Pop

Function Call: Activation record (parameters, local variables, return address) pushed to stack
Function Return: Activation record popped from stack

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19
Q

Key info about the heap structure

A
  • Dynamically allocated like the stack
  • Blocks of memory are allocated and removed in an arbitrary order

Used when you need:
- To store a large block of memory for a longer period of time
- Variables that can change size dynamically

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20
Q

What is Process Hierarchy?

A

In Unix-like systems there is a hierarchy of processes

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21
Q

What is process spawning?

A

The method by which a process (parent) creates a new process (child)

  • In linux there are 4 system calls for process spawning:
    • fork()
    • wait()
    • exec()
    • exit()
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22
Q

Define a Preliminary

A
  • A process is a program in execution

-Processes change their state over the process lifecycle

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23
Q

What is a process scheduler?

A

Process schedular allocates CPU time to various processes

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24
Q

What are 4 scheduling algorithms?

A

First Come First Served (FCFS)
Round Robin (RR)
Shortest Process Next (SPN)
Multilevel Queing

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25
Q

What is the key info of a FCFS?

A

FIFO - Processes get executed in order arrived

Non-preemptive - Not interrupted until finshes or reaches a wait state

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26
Q

What are the Pros and Cons of FCFS?

A

Pros:
1. Simple and easy to implement
2. Reduced Context Switching
3. Intuitively fair
4.No starvation

Cons
1. Convoy Effect - Long waiting time and poor responsiveness

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27
Q

What is the key info of a Round Robin?

A

Time-sliced (quantum) FIFO execution

Preemptive

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28
Q

What are the pros and cons of the Round Robin

A

Pros:
Fair CPU Allocation
Responsiveness
No Starvation

Cons:
Time Quantum Sensitivity
Context Switch Overhead

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29
Q

What is the key info of a SPN?

A

Select the process with the shortest execution time

Non-Preemptive – Preemptive (Shortest Remaining Time)

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30
Q

What are the pros and cons of the SPN?

A

Pros:
Better average waiting time
Responsiveness

Cons:
Estimating process execution time
May lead to starvation
Longer processes wait longer

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31
Q

What are the pros and cons of Multi-level Queuing?

A

Pros:
Supports different performance objectives

Cons:
Complex and difficult to calibrate

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32
Q

What is Multi-level Queueing?

A
  • Processes are divided into different queues based on their priority and characteristics.
  • Each queue has its own scheduling algorithm.
  • Improves efficiency by grouping similar processes and handling them with specialized algorithms.

( Commonly used to manage and prioritize different types of processes, such as interactive and batch processes )

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33
Q

What is a multi-core processor?

A
  • A multi-core processor has multiple processing units (cores) on a
    single CPU chip
  • Each processor/core has its own L1 cache memory
  • There is a cache hierarchy
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34
Q

What are the two types of efficient Multi-Processor Scheduling?

A

Load Balancing

Processor Affinity

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35
Q

What is Load Balancing?

A

Evenly distribute processes among CPU cores

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36
Q

What is Processor Affinity and Soft Affinity

A

Processor Affinity: Keep a process on the same CPU core(s)

Soft Affinity: Only move processes if there is a good reason

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37
Q

What is Monoprogramming?

A

Single Process

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38
Q

What is Multiprogramming?

A

Multiple Processes

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39
Q

What are the 3 memory Management Tasks?

A
  1. Relocation
  2. Protection
  3. Sharing
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40
Q

Define Relocation

A

Moving a process to a new location in memory without disrupting its execution

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41
Q

Define Protection

A

User processes need to protected from each other

System processes should be protected from user’s processes

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42
Q

Define Sharing

A

Processes may sometimes need to share data

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43
Q

What are the 6 Memory Management Techniques

A
  1. Fixed Partitioning
  2. Dynamic Partitioning
  3. Simple Segmentation
  4. Virtual Memory Segmentation
  5. Simple Paging
  6. Virtual Memory Paging
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44
Q

What is the key info on Fixed/Static Partitioning?

A

Memory divided into partitions of fixed boundaries (equal or unequal sizes)

1-to-1 mapping of partitions and processes

Process loaded into partitions ≥ its size

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45
Q

What are the pros and cons of Fixed Partitioning?

A

Pros:
Easy to uunderstand and implement
No external fragmentation

Cons:
Internal Fragmentation
Limited by number & size of partitions

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46
Q

What is the key info of Dynamic Partitioning?

A

Exact memory allocation – only what is needed
- Partitions of variable length and number
- 1-to-1 mapping

Starts well, then leads to external fragmentation

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47
Q

Define External Fragmentation

A

Space is wasted between partitions

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48
Q

Define Compaction

A

Shift processes for unified free memory space

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49
Q

What are the pros and cons of Dynamic Partitioning?

A

Pros:
No internal fragmentation
Efficient than static partitioning

Cons:
External fragmentation
Overhead of compaction

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50
Q

What is the key info of Single Segmentation?

A

Processes divided into segments

Segments are loaded into memory as in partitioning

Segments do not need to be contiguous

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51
Q

What is the key info of Virtual Memory Segmentation?

A

Virtual memory use disk space to extend main memory; illusion of larger memory

Segments can be swapped between memory and disk storage

OS loads segments into memory as needed

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52
Q

What are the pros and cons of Virtual Memory Segmentation?

A

Pros
Can fit processes larger than memory
Segment Sharing and Protection
No internal fragmentation
Efficient than static partitioning

Cons:
More complex memory management
External fragmentation (< dynamic)
Overhead of compaction

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53
Q

What is the key info of Simple Paging?

A

Memory divided into equal size frames

A process is divided into same-size pages

Internal fragmentation is small since:
- only affects the last frame of each process
- the frame/page-size is fairly small

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54
Q

What are the pros and cons of Simple Paging?

A

Pros:
No External Fragmentation
Simple memory allocation

Cons:
Small Internal Fragmentation
Page tables can become large

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55
Q

What is Virtual Memory Paging

A

Pages are loaded into frames as in simple paging, except, that not all the pages need to be loaded at the same time

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56
Q

What are the pros and cons of Virtual Memory Paging?

A

Pros:
Can fit processes larger than memory
No external fragmentation
Simple memory allocation

Cons:
Virtual Memory overhead
Small Internal fragmentation
Page tables can become large

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57
Q

What are the goals of Protection & Sharing (with Segmentation and Paging) ?

A

Protection: Each process can only access its own pages/segments

Sharing: Multiple processes can access the same page/segment

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58
Q

How is Protection & Sharing implemented (with Segmentation and Paging) ?

A

Each frame/segment has a number of protection bits specifying

Read, write, execute permissions, which processes have these permissions

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59
Q

What is the result of Protection & Sharing when using segmentation instead of paging?

A

Protection/sharing is generally easier with segmentation than paging since:
- Segment table is smaller than page table
- Segments are more natural units for protection/sharing

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60
Q

How do Positional Numeral Systems work?

A

The contribution of a digit to the value of a number is the value of the digit multiplied by a factor determined by the position of the digit

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61
Q

What is the key info for the octal system?

A

Base 8

Easier shorthand for binary

An octal represents 3 bits.

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62
Q

What is the Memory Hierarchy?

A

Speed (Top to bottom):
Registers
Cache
Main Memory
Disk

Size (Top to bottom):
Disks
Main Memory
Cache
Registers

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63
Q

What are the main components of a computer?

A
  1. Disk Controller
  2. USB Controller
  3. Graphics Controller
  4. CPU
  5. Memory
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64
Q

What is the key info of the CPU?

A

Controls the execution of instructions

A CPU will use a specific instruction set architecture (ISA), such as ARM or x86

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65
Q

Define a register

A

Small, fast memory locations within the CPU

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66
Q

What are the different types of registers?

A
  • General purpose registers: data storage, address calculations and
    arithmetic operations
  • Special purpose registers: Program counter, Base pointer, Stack
    pointer, Link register, Current program status register
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67
Q

How does the Stack pointer work?

A

Points to the top of the stack

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68
Q

How does the Base pointer work?

A

Points to the start (base) of the current frame

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69
Q

How does the Link Register work?

A

Stores the return address for after function completion

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70
Q

How does the program counter work?

A

Stores the address of the next instruction to be executed

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71
Q

How does the ALU work?

A

Handles arithmetic and logical operations

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72
Q

What does the current program status register do?

A

Contains status and mode bits

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73
Q

What is assembly language?

A

Simple instructions

Difficult programming language

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74
Q

What is branching?

A

Branch instructions will “jump” to a different instruction

They do so by changing the program counter

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75
Q

What is Temporal Locality?

A

Items accessed recently are likely to be accessed again soon
- Example: loops

If you want to discard data, start with one that has not been request in a long time

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76
Q

What is Spacial Locality?

A

Items located near each other in memory are likely to be accessed within a short period of time
- Most programs exhibit spatial locality

Copy additional nearby memory locations into the cache

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77
Q

What are Hits and Misses?

A

A memory request may be a:
- Cache hit – the cache contains the data (faster data return)

  • Cache miss – the cache does not contain the requested data – first
    read from memory
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78
Q

What are the 3 Cache Designs?

A
  1. Direct Mapping
  2. Fully-associative Mapping
  3. Set-associative Mapping
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79
Q

What is the key info of a Directed-Mapped Cache?

A

Each block of main memory maps to one unique cache line

Each line connects the connects the corresponding block of cache memory to each block of main memory

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80
Q

What are the pros and cons of a Directed-Mapped Cache?

A

Pros:
Simple, Easy to implement & search

Cons:
Inefficient use of the cache space

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81
Q

What is the key info of a Fully-Associative Cache?

A

Each block of main memory can map to any line of the cache

Replacement algorithm: LRU (Least Recently Used)

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82
Q

What are the pros and cons of a Fully-Associative Cache?

A

Pros:
Flexible

Cons:
Takes a long time to search

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83
Q

What is the S-Way Set-Associative Cache

A

The cache is divided into N cache sets

Each cache set consists of S lines

Each block of main memory maps to one unique cache set

Replacement algorithm: LRU (Least Recently Used)

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84
Q

What are write hits and write misses?

A

A write request may be a:
- Write hit – the address we want to write to is present in the cache

  • Write miss – the address we want to write to is not present in the
    cache
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85
Q

How would you deal with a Write Hit?

A

For a write hit, there are two options:

  • Write-back – initially write only to cache
    • Write into memory if being replaced
    • Pros: fast writes
    • Cons: mechanism for cache coherence
  • Write-through – write into both cache and memory
    • Pros: consistency between the cache and memory
    • Cons: slow writes
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86
Q

How would you deal with a Write Miss?

A

For a write miss, there are two options:
- Write around (no-write allocate) - write into memory only
- Pros: Avoids unnecessary cache access and cache pollution
- Cons: Does not utilize temporal locality

  • Write allocate – fetch from memory and write into cache
    • Pros: exploits spatial and temporal locality
    • Cons: Potential unnecessary cache access and cache pollution
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86
Q

Whats the result of a High Temporal Locality and a Low Temporal Locality?

A

High Temporal Locality: Write-Back + Write Allocate

Low Temporal Locality: Write-Through + Write Around

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87
Q

What is Virtual Memory?

A

Use disk storage as if it was main memory

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88
Q

Define Demand Paging

A

Only load a page when there is a request for it

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89
Q

What are the pros and cons of Demand Paging?

A

Pros:
More processes can be loaded into main memory

Cons:
Thrashing - the CPU spends too much time on swapping pages

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90
Q

Define Pre-Paging

A

Guess which pages will be requested and pre-load them

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91
Q

What are the pros and cons of Pre Paging?

A

Pros:
Less overhead when page predictions are accurate

Cons:
Resources are wasted on loading unused pages

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92
Q

What is a Non-pipelined Cycle?

A

The time required to execute an instruction is the sum of the time required by each stage

93
Q

What is a Pipelined Cycle

A

Where multiple stages of a task are completed simultaneously, each stage handled by a different part of the system

(allowing for continuous and efficient workflow).

94
Q

What are the Pipeline performance measures?

A

Clock Cycle Time - time within which each pipeline stage must complete its operation

Clock Speed - frequency CPU’s clock runs (1/Clock Cycle Time)

Execution Time - Clock cycles for program x Clock cycle time

95
Q

What are the two main hazards of pipelining?

A

Control Hazards

Data Hazards

96
Q

What is a Control Hazard?

A

A control hazard occurs when a branch instruction changes the next instruction

97
Q

How would you deal with Control Hazards?

A

Ways to deal with control hazards:
1. Stall the pipeline
2. Assume the branch not taken
3. Branch prediction

98
Q

What is Stalling the Pipeline?

A

Stop fetching and executing next instructions until branch result becomes known

99
Q

What are the pros and cons of Stalling the Pipeline

A

Pros:
No need to do anything

Cons:
Wasting time and resources

100
Q

What is “Assume Branch Not Taken” ?

A

Processor assumes branch not taken

Squashing instructions if wrong

101
Q

What are the pros and cons of Assuming Branch Not Taken?

A

Pros:
No need to guess the next instruction

Cons:
Wasting time and resources if branch taken

102
Q

What is Branch Prediction?

A

Processor may try branch prediction based on past branches

If the prediction is incorrect, instructions are squashed.

103
Q

What are the pros and cons of Branch Prediction?

A

Pros:
Can reduce wasted clock cycles

Cons:
Branch prediction overhead

104
Q

Define Data Hazard

A

When an instruction requires a result from a previous instruction before that result has been computed/written.

105
Q

What are the 3 Data Hazard Types?

A

Read After Write (RAW) - True Dependency
- Instruction writes, then another reads same location
- Hazard if read happens before write completes

Write After Read (WAR) - Anti Dependency
- Instruction reads, followed by another writing to same location
- Hazard if write completes before the read

Write After Write (WAW) - Output Dependency
- Two instructions write to the same location
- Hazard iuf write occur in reverse intended order

106
Q

What is the side effect of Deeper Pipelines

A

More pipeline stages means:
- a larger penalty for incorrect branch predictions
- a bigger risk of data hazards

107
Q

What are the two ways for a processor to get more done per clock cycle?

A

1.Caching
2. Pipelining

108
Q

Define Caching

A

A processor fetches instructions and data from cache and memory if possible

109
Q

Define Pipelining

A

The execution of an instruction is divided into multiple stages

110
Q

Define Control Hazards

A

Control hazards occur due to branch instructions

111
Q

What are the similarities and differences of Spectre and Meltdown

A

Similarities:
- Exploit built-in vulnerabilities, not bugs
- Require attacker to be using the system

Differences:
- Spectre reads memory from other processes
- Meltdown can also read kernel memory from user space

112
Q

What is Parallel Computing?

A

Improve performance by performing multiple computations in parallel

113
Q

What are 5 examples of Parallel Computing?

A
  1. ILP - Pipelining
  2. Threads
  3. Multi-core processors
  4. Multiprocessors
  5. Multicomputers
114
Q

What is Processor Frequency Scaling?

A

Due to physical and thermal limitations, clock speeds cannot be increased indefinitely

115
Q

What is Flynn’s Taxonomy?

A

A classification of computer architectures based on number of instruction and data streams they can handle simultaneously

116
Q

Define an Instruction Stream

A

Sequence of instructions; arithmetic, data transfer, and branching

117
Q

Define a Data Stream

A

Consists of operands (constants, variables, and memory addresses)

118
Q

Define Single Instruction, Single Data (SISD)

A

Sequential computer with no data or instruction parallelism

(Example: Older single-core CPUs & simple microcontrollers)

119
Q

Define Multiple Instruction, Single Data (MISD)

A

Multiple instructions operate on one piece of data simultaneously

  • Used for fault tolerance
  • Rare in practice

(Example: Space shuttle flight control systems)

120
Q

Define Single Instruction, Multiple Data (SIMD)

A

Execute the same instruction on multiple data points simultaneously

121
Q

What is a Graphics Processing Unit (GPU)?

A

A GPU contains many ALUs to perform mathematical operations in parallel

(Based on SIMD architecture)

122
Q

Compare GPU’s to CPU’s

A

GPUs have more ALUs and rely less on cache

GPUs have a high throughput and higher latency

123
Q

What is the key info on Threads?

A

GPUs hide latency by utilizing threads

A process may be divided into multiple threads

Threads within a process share data, heap, and code, but have their own registers and stack

124
Q

Define Multiple Instruction, Multiple Data (MIMD)

A

Multiple processors simultaneously execute different instructions on different pieces of data

125
Q

Define a Multi-core Processor

A

A multi-core processor puts many CPU cores on one chip

126
Q

Define a Multiprocessor

A

Two or more CPUs within a single computer system

CPUs communicate through shared memory variables

127
Q

Define a Multi-Computer

A

Different computers connected together

128
Q

Shared vs Distributed Memory

A

Shared (multiprocessors)
- Processors communicte through the shared memory
- Faster communication

Distributed (multicomputers)
- Processors communicate by passing messages
- Allows for higher bandwidth

129
Q

What are the two energy problems the world faces?

A
  1. Greenhouse gas emissions
    - Energy generates 87% of global greenhouse gas emissions
    - Richest countries have most emissions
  2. Energy Poverty
    - Low emissions of the poor as they lack access
    - No electricity prevents key needs such as refrigiration and lights at night
130
Q

What is the solution to emissions of greenhouse gas?

A

Reducing greenhouse gas emissions
- Shifting to renewable energy sources
- Phasing out fossil fuels and other high emission transport and industrial
practices
- Improving energy efficiency

Removing gases from the atmosphere
- Ecosystems like forests and wetlands that absorb CO2-
- Using technologies like carbon capture and storage (CCS)

131
Q

What is the Energy Demand for ICT (Information and Communication Technology) by 2030 ?

A

ICT energy demand might rise to 8% of total electricity demand by 2030 at best case, or worst case rise to 21%.

In 2020, ICT secotr used an estimated 4-6%.

132
Q

What is “The Quick and the Dead” ?

A

Historically, the processor world consisted of the quick (those with high SPECs) and the dead (those without).

133
Q

What is “The Energy-Efficient and the Dead” ?

A

Today, the processor world increasingly consists of the energy-efficient (those with high SPEC marks/watt) and the dead (those without).

134
Q

What is the Sleep State?

A

Up to 1990, there were 2 states: On, Off

Intermediary states; e.g. a sleep state with:
- low power consumption
- quick recovery to active state based on user output

135
Q

What is Advanced Configuration & Power Interface (ACPI) ?

A

A standard device configuration and power management by the OS

It allows the OS to control the amount of power supplied to various devices using different power states

136
Q

What are the 4 ACPI states?

A
  1. Global
  2. Device
  3. Processor
  4. Performance
137
Q

What are the Global States G0-G3?

A

Apply to the entire system and are visible to the user

G0: Powered on (Working)
G1: Sleeping
- S1: Power On Suspend (POS)
- S2:CPU Powered off
- S3: Stand by
- S4: Hibernation
G2: Powered off (Soft Off)
G3: Unplugged (Mechanical Off)

138
Q

What are the Device States D0-D3?

A

States of particular devices (e.g. disks, keyboards); generally, not visible to the user

D0: Fully Operational
D1: Intermediate states
D2: Device is off

139
Q

What are the Processor States C0-C3 ?

A

Processor power consumption and thermal management states – Substates of G0

C0: Fully operational
C1: Ready — short wake time
C2: Ready — long wake time
C3:Sleep

140
Q

How do Performance States P0-P15 work?

A

Power consumption and capability states within the active states (substates of D0/C0)
A processor could save energy by scaling down power and
clock frequency (P0 ⇒ P1, . . . , P15)

141
Q

What is Power Usage Effectiveness (PUE) ?

A

A metric used to determine the energt efficiency of a data centre.

PUE = Total facility energy / IT energy
or
PUE = 1 + Non IT facility energy/IT equipment energy

142
Q

What is the PUE scale/metric chart?

A

1.0 = Ideal
1.2 = Very efficient
2 = Average
2.5 = Inefficient
3 = Very Inefficient

143
Q

What is the Open Compute Project (OCP)?

A

The OCP is a collaborative community focused on redesigning hardware to efficiently support growing demands on compute infrastrucutre

144
Q

Define a Computer Network

A

Group of devices that are connected offer certain services

145
Q

What are Hosts (end devices) ?

A

Source or destination of a message

Client or sever or both

Have unique physical and logical address

146
Q

What are Intermediary Network Devices?

A

Connect hosts to the network, and connect networks together

147
Q

Define peripherals

A

Don’t have logical address

Rely on their connected host to perform all network operations

148
Q

What are the 3 types of Network Media?

A

Metallic “Copper” Wires (Electric pulses)

Fiber-optic Cable (Light pulses)

Wireless (Electromagnetic waves)

149
Q

Define a LAN

A

Usually spans a single geographic area

Administered by a single organization

Characterized by high data speeds

May be a single local network or interconnected local networks

150
Q

Define a WAN

A

Group of LANs interconnected within large area

TSP interconnects these geographical spanned networks

Characterized by slow data speeds

151
Q

Define the Internet

A

Global mesh of interconnected networks

152
Q

Define Communication Protocols

A

Just like humans, computers use protocols to communicate

153
Q

Define Protocol Stack (Suite)

A

A group of interrelated protocols that are necessary to perform a communication function

154
Q

Define Protocol Data Unit (PDU)

A

A generic term for data at each layer

155
Q

Define Segmentation

A

The process of breaking data into pieces

156
Q

Define Encapsulation

A

The process of adding control information to the data at each layer

157
Q

What is the key info of Client Server model?

A

Client requests a service

Server offers a service

Centralized administration

158
Q

What is the key info of Peer-to-Peer model?

A

A device acts as both the client and a server within the same communication session

No need for centralized server

159
Q

What is Hypertext Transfer Protocol?

A

WWW is a massive collection of interlinked documents and resources

HTTP facilitates the transfer of these resources (e.g HTML files)

160
Q

What are the 3 main HTTP methods and their descriptions?

A

GET - Retrieves data
POST - Submits data
DELETE - Deletes data

161
Q

How is a web page loaded?

A

The client send HTTP requests to get other resources in the HTML file unless they are cached

162
Q

What is HTTPS

A

Ensures the identity of the server and encrypts transmitted data

163
Q

What is the Dynamic Host Configuration Protocol?

A

DHCP automates the assignment of IP address, Subnet mask, Default gateway, DNS server

It selects the IP address from a pool of addresses and once used it returns to the pool to prevent running out of addresses

164
Q

What are Telnet and SSH?

A

Both are Remote access protocols:
- Telnet transfers data as plain text
- Secure Shell offers a secure alternative

165
Q

What is the key info for DNS?

A

Devices are labeled with numeric IP address

Domain names are names for the numeric IP addresses

DNS translates human-readable domain names into machine-readable IP addresses

166
Q

What does URL stand for?

A

Uniform Resource Locator

167
Q

What is Shared hosting?

A

An IP address mapped to multiple host names

168
Q

What is Load balancing and redundancy?

A

A host name mapped to multiple IP addresses

169
Q

What are the 4 DNS Requirements?

A
  1. Scalability
  2. Efficiency
  3. Reliability
  4. Maintainability
170
Q

What is a Root DNS server?

A

Top level, represented by (.)

Thirteen logical root DNS servers

Redundancy: each logical root server refers to multiple physical ones

First point of contact if a DNS resolver can’t resolve a name

171
Q

What is a Top Level Domain Server?

A

Organizational (com, org, edu, gov, net)

Geographical (uk, us, fr, eg, sp, de)

Managed by ICANN (Internet Corporation for Assigned Names and Numbers)

172
Q

What is an Authorative Server?

A

Holds the complete data for a domain’s DNS records

Source of DNS responses

To ensure maintainability, Authoritative servers must be updated automatically

173
Q

What are Domains and Sub-domains?

A

Web addresses may utilize multiple subdomains separated by periods (.) in a hierarchical fashion.

computerscience.exeter.ac.uk

computerscience = 4th level domain
.exeter = 3rd level domain
.ac = 2nd level domain
uk = Top-level domain

174
Q

What does DNSSEC do?

A

DNNSEC adds a layer of trust on top of DNS

175
Q

What is Assymetric Encryption?

A

Asymmetric encryption use a pair of keys (private and public)

Using the encryption key as the public key (private communication)

Using the decryption key as the public key (Signature verification of documents)

176
Q

What is a Hash Function?

A

A hash function takes data of arbitrary size, M, an returns a fixed-size number, H(M)

177
Q

What identifies what transport layer protocol should be used?

A

Application developer choose the transport layer protocol based on the requirements of the application

178
Q

What is they info of TCP and UDP?

A

TCP:
Connection-oriented protocol
Reliable delivery with higher overhead and latency
(HTTP, FTP, Telnet SMTP)

UDP:
Connectionless protocol
Unreliable, minimal overhead and latency
(DHCP, RIP, TFTP, Online games, Video Streaming and VOIP)

179
Q

What is the key info of Transport Layer Functions?

A

TCP and UDP Shared Functions:
Segmentation and Reassembly
Conversation Multiplexing using port numbers
Error detection

Additional TCP Functions:
Connection Establishment (3-way handshake)
Connection Management: Reliability (ack), Flow control and Error correction
Connection Termination (4-way handshake)

180
Q

What is Sender Segmentation and Encapsulation?

A

The transport layer divides data into pieces and adds a header for delivery over the network

UDP:
Header prodives for:
source and destination (ports)

TCP:
Header provides for:
Sources and destination (ports)
Sequencing for same-order delivery
Acknowledgement of received segments
Flow control and congestion management

181
Q

What are the Network Ports ?

A

Well-known ports (0 to 1023) – reserved for well-known services

Registered Ports (1024 to 49151): assigned for user processes & others

Dynamic or Private Ports (49152 to 65535): Dynamically chosen by a client when initiating a connection to a server

182
Q

What does the Transport Layer allow and what does the Network Layer allow?

A

Transport Layer allows end-to-end transfer of application data

Network (Internet) Layer allows end-to-end device communication

183
Q

What are 4 key ideas behind Host to Host communication?

A
  1. Addressing
  2. Encapsulation
  3. Routing
  4. Decapsulation
184
Q

What is an IPv4 Address?

A

Uniquely identifies a device on an IP network

32-bit broken into four octets using dotted-decimal format

185
Q

What is IPv4 Hierarchical Structure?

A

Prefix Length - number of bits reepresenting network portion

Subnet Mask - 1s represent network portion and 0s for host portion

186
Q

What are the types of IPv4 Addresses?

A

Network Address - all host portion bits are zeros (0)

Broadcast Address - al lhost portion bits are ones (255)

Host Address - Between network & broadcast (1-254)

187
Q

What is Subnetting?

A

Dividing a single address block into multiple logical networks
- Borrowing bits from host portion to network portion

188
Q

What is Borrowing Bits in a Subnet?

A

The process of taking bits from the host portion of an IP address and using them to create additional subnets within a given network.

This technique allows network administrators to divide a larger network into smaller, more manageable sub-networks.

189
Q

Define a Public address

A

Addresses used in networks accessible on the Internet

190
Q

Define a Private address

A

Addresses used in internal networks aren’t routable on the Internet

191
Q

What does NAT do?

A

Changes a private IPv4 address to a public address so it has internet access

192
Q

What is Internet Control Message Protocol (ICMP)?

A

Messaging protocol - sends messages and operational information

Used for error reporting and diagnosing network issues
- Testing connectivity (ping)
- Observing the path (tracert)

193
Q

What are 4 Device Configurations?

A
  1. IP address
  2. Subnet Mask
  3. Default gateway
  4. DNS Server
194
Q

What is the Internet of Things (IoT) ?

A

Network of physical objects - for connecting and exchanging data over the internet

The IoT is increasing the demand for IP addresses

195
Q

What is IPv4 Exhaustion?

A

Most IPv4 addresses have been used and therefore they are running out

As there are only 2^32 combinations.

196
Q

What are 3 ways to conserve IP addresses?

A

Classless Inter-domain Routing (CIDR) – Classless addressing

Public and private IPs

Network Address Translation

197
Q

What does CIDR do?

A

Reduces the waste of IP addresses

198
Q

What are 4 features of IPv6?

A
  1. Large Address Space
  2. Simplified Header
  3. Built-in security
  4. Jumbo grams
199
Q

What is the format of IPv6?

A

8 blocks of 4 hex digits

2001:0db8:0000:0042:0000:0000:abcd:ef12

200
Q

What is abbreviation of IPv6?

A

Discard Leading zeros in blocks

Double colon for consecutive zeros - Done once

2001:db8:0:42::abcd:ef12

201
Q

What does EUI-64 do?

A

Automatically generates a unique 64-bit interface ID

However is not recommended due to privacy issues

202
Q

What is the use of Jumbo grams?

A

Using jumbo grams in situations with low risk of transmission failure can reduce communication overhead

203
Q

What is a simple rule for Network Communication?

A

Works badly if two or more computers send messages at the same time

Works well if one computer sends a message at a time (for a limited period of time)

204
Q

What are the 2 types of Multiple Access Protocols?

A

Carrier sense, multiple access/ collision detection (CSMA/CD), for wired networks

Carrier sense, multiple access/ collision avoidance (CSMA/CA), for wireless networks

205
Q

CSMA/CD: Carrier Sense and Multiple Access

A

In a CSMA/CD wired network:
- All computers are attached to a shared cable – Multiple Access (MA)
- Any computer may transmit if the cable is unused – Carrier Sense
(CS)

206
Q

CSMA/CD: Collision Detection and Waiting Time

A

In a CSMA/CD wired network:
- While transmitting, a computer may detect that its receiving a
message – Collision Detection (CD)
- After detecting a collision, a computer waits for a random interval
(chosen from an exponentially-doubling range), and then tries again

207
Q

Why is CSMA/CD rarely used today?

A

As modern Ethernet variants avoid collisions by operating in full-duplex mode

208
Q

CSMA/CA: Carrier Sense and Multiple Access

A

In a CSMA/CA wireless network:
- All computers use a shared frequency – Multiple Access (MA)
- Any computer many transmit if the frequency is clear – Carrier
Sense (CS)

209
Q

CSMA/CA: Collision Avoidance

A

In a CSMA/CA wireless network:
- Frequency clear = transmits after an instant
- Frequency busy = counts down from random value while channel is
clear; otherwise, the count is frozen – Collision Avoidance (CA)
- Computer then transmits and receives an acknowledgement

210
Q

What is the Hidden Node Problem?

A

A computer may be in range of the base station, but out of range of another computer

This may be solved by reservation using ready to send and clear to send messages

211
Q

What is the Token Ring Protocol?

A

A token continuously circulates, to which messages may be attached, and from which they may be removed

Token Bus - The token is passed around a virtual ring

212
Q

What is the Bit-Map Protocol ?

A

Host n may announce that is has a frame to send by inserting a 1 bit into slot n

Following this, hosts begin to transmit frames in numerical order

213
Q

What is the Binary Countdown protocol?

A

Hosts that wish to transmit broadcast their binary address. Hosts with “1”s in their address get priority. The winner of the bid gets to transmit a frame.

214
Q

What is a network gateway?

A

Modern networks have a single fortified point of entry/exit

215
Q

List 4 Firewall Characteristics

A

A firewall can:
- Restrict both incoming and outgoing traffic
- Use both positive and negative filters
- Consider both the payload and different TCP/IP headers
- Consider packets individually or as part of a flow

216
Q

What are the 4 types of Firewalls?

A

The principal types of firewalls are:
1. Package-filtering Firewalls
2. Stateful packet inspection Firewalls
3. Application-level Gateways
4. Circuit-level Gateways

217
Q

Define a Packet-Filtering Firewall

A

Filters individual packets on the basis of the packet headers and packet payloads

218
Q

Define a Wildcard Mask

A

A wildcard mask indicates which bits of an IP address a particular rule is concerned with during IP address matching.

  • 0: The corresponding bit must match
  • 1: The corresponding bit doesn’t matter
219
Q

Define a Stateful Firewall

A

Same as a packet filtering firewall, but also filters packets on the basis of a directory of established transport-layer connections.

220
Q

What is a Application-Level Gateway?

A

An application-level gateway filters packets based on applications or certain features of applications

Sets up two TCP connections: one from the trusted network to the firewall, and one from the firewall to the untrusted network

221
Q

What is a Circuit-Level Gateway?

A

A circuit-level gateway determines which TCP connections will be allowed. Just as the application-level gateway, a circuit-level gateway sets up two TCP connections.

222
Q

Define a Single Firewall Inline

A

Puts a firewall between external and internal router

223
Q

Define a Double Firewall Inline

A

Puts demilitarized zone (DMZ) between external and internal firewall. The DMZ is a network for systems that must be externally accessible, but still needs some protection.

224
Q

What is a Virtual Private Network (VPN) ?

A

Uses encryption and authentication to provide a secure connection through an otherwise insecure network – typically the internet

225
Q

What are the pros and cons of a VPN?

A

Pros:
Can be sued to bypass firewalls and other restrictions, and to increase privacy and security

Cons:
May result in lower connection speed, blocks from certain internet services, and realse of your data to third parties.

226
Q

What are the 4 rules that a IPv6 Address must follow?

A
  1. Double colons cannot appear more than once, as it causes
    confusion to how many zeros each double colon represents
  2. Based on Hexadecimal therefore can only contain hex values
  3. Maximum of 4 values between every pair of sequential colons
  4. Must have 32 symbols (8 blocks of 4)
227
Q

A program requests 5 memory blocks which are all, one by one, brought into a 2-way set-associative cache. What is the case where
a) 2
b) 3
c) 4
d) 6
of the 5 memory blocks are still in the cache after the fth block has been placed?

A

a) All 5 have been mapped to same cache set
b) 4 have been mapped to same cache set
c) 3 have been mapped to same cache set
d) No more than 2 have been mapped to same cache set

228
Q

When initialising the IP header for a packet. Describe the disadvantage/risk of

i) a too small initial time-to-live value?
ii) a too large initial time-to-live value?

A

i) initial time-to-live value sets an upper limit on number of routers that the packet can pass before being discarded.
With a too small initial time-to-live value, the packet may be dropped before reaching its destination

ii) With a too large initial time-to-live value, there is a risk that the packet gets stuck in a routing loop, which will unecessarily consume bandwidth and may slow down the network.

229
Q

A HTTP request line (part of HTTP request) is not identical to a HTTP status line (part of HTTP response). Explain why.

i) only the request line specifies a method?

ii) only the status line specifies a status message

iii) both the request line and the status line specifiy a HTTP version?

A

i) The status line doesn’t need a mathod, since the HTTP response is based on the method in the request line.

ii) The status message specifies the results of request. These results aren’t available when HTTP request is sent, therefore not be a part of request line.

iii) The request line specifies the clients HTTP version the status line specifies the HTTP version used in the HTTP response.

230
Q

CSMA/CD uses a random waiting time with a range that doubles after each consecutive failed attempt. What would be the risk of
i) using a too long random waiting time?
ii) using a too short random waiting time?
iii) using a deterministic waiting time?
iv) not doubling the range after each failed attempt?

A

i) Amount of transmitted data will decrease, since stations will be waiting even though line is clear

ii) Network will be heavily loaded, and there will be an increased number of collisions

iii) 2 computers that have collided will get stuck in a loop where they wait for same length of time and collide again

iv) Typical waiting time won’t adjust to the load of the network, and there is a risk that the network performance will drop significanlty if too many computers join network

231
Q
A

Computer Science (Year 1) (1 decks)

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