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Computing > Computer Systems 2 > Flashcards

Computer Systems 2 Flashcards

1
Q

Combinational circuits consit of?

A
  • Logic gates connected together
  • Has some inputs and produces some outputs
  • Contains no feedback loops
  • Outputs are a pure boolean function of the current input values
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2
Q

Procedure for Combinational circuit simulation

A

Find an output of a logic gate where all the inputs are known, and write down the output value (using the truth table for the logic gate)

Repeat until all signals are known

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3
Q

A multiplexor is a hardware version of?

A

The if-then-else expresson

mux1 c x y = if c is zero then x else y

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4
Q

What is a Clock Skew?

A

The clock ticks do not reach the flip flops at exactly the same time

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5
Q

A cicuit is synchronous if?

A
  • It contains logic gates and flip flops
  • Every flip flop is connected directly to a unique global clock
  • No logic functions are performed on the clock signal
  • Clock tick reaches each flip flop simultaneously
  • Every feedback loop in the circuit passes through a flip flop
  • The inputs to the circuit are assumed to remain stable throughout an entire clock cycle
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6
Q

Describe some behaviours of a synchronous circutit

A
  • There is a single global state, comprising the states of all the flip flops in the entire circuit
  • At each clock cycle, the circuit inputs and the flip flop outputs go into the combinational logic, which settles down in order to provide new inputs to the flip flops
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7
Q

A synchronous circuit is a sequential circuit that is designed so that…

A

All flip flops change their state at the same point in time

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8
Q

The synchronous design is a tradeoff, Explain..

A
  • The designer gives up the ability to use some design techniques that may offer better speed
  • In return, the behaviour of the circuit is much easier to reason about, especially for large and complex circuits
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9
Q

Describe some benefits of the synchronous model

A
  • Entire circuit behaves as a single finite state automaton
  • Simulate its behaviour with a simulation table
  • It is not necessary to consider intermediate signal values in the combinational logic
  • Temporary changing signal values (due to gate delays) can be ignored
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10
Q

When to use a combinational circuit?

A
  • For pure mathematical functions (as long as they aren’t too complicated)algebra
  • For computations that can be performed within one clock cycle
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11
Q

When to use a sequential circuit?

A
  • For algorithms that require iteration
  • For functions that would require too much time for one clock cycle
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12
Q

Describe some techniques for combinational design

A
  • Specification as a boolean expression
  • Synthesis from truth table
  • Use multiplexor for conditional expression
  • Describe the value you want on a signal, then introduce a building block to calculate it
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13
Q

Describe some technieques for sequential design

A
  • Think of the states you want the machine to go through
  • Introduce flip flops or registers to hold the state
  • Describe the values you want to put into the flip flops or registers
  • Design combinational circuits to calculate those values
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14
Q

Describe some characteristics of Sigma 16

A
  • RISC style
  • 16 - Bit words
  • 16 bit memory address
  • Instruction fields are 4 bits wide
  • Instructions can be one or two words
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15
Q

One word instructions in Sigma 16 are?

A

RRR instructions

add R1,R2,R3

sub R1,R2,R3

etc

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16
Q

Two word instructions in Sigma 16 are?

A

RX instructions

lea R1,const[R2]

jumpf R1,const[R2]

etc

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17
Q

In Sigma 16 the pc register..

A

program counter: address of the next instruction

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18
Q

In sigma 16 the ir register….

A

instruction register: the instruction currently being executed

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19
Q

In sigma 16 the adr register…

A

address register: for calculating the effective address

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20
Q

In sigma 16 the dat register…

A

data register; used as buffer for the memory

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21
Q

In sigma 16 the trap instruction…

A
  • Has three register operands (it’s an RRR instruction)
  • The first register contains a trap code that tells the operating system what the program is requesting
  • The other registers may contain further data
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22
Q

Describe the Control circuit…

A
  • The circuit outputs a set of control signals
  • The behaviour of the datapath is determiend by the values of the control signals
  • The control circuit needs to examine a small number of signals within the datapath, in order to figure out what to do
  • Therefore each circuit recevies inputs from the other, and sends outputs to the other
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23
Q

The instuction set architecture ISA defines…

A
  • The registers and memory which are visible to the programmer
  • The set of instructions
  • How the instructions are represented (as words of bits)
  • The effect of executing each type of instruction
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24
Q

In translating pseduocode to assembly language,

Describe statement-by-statement…

A
  • Each statement is compiled independently
  • Straightforward but inefficient
  • Use this style if you feel confused
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25
Q

In translating pseudocode to assembly,

Describe register-variable style

A
  • More efficient, but you have to keep track of whether variables are in memory or a register
  • Real compilers use this style
  • Use this style if you like the shorter code it produces
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26
Q

Describe some characteristics of statement-by-statment

A
  • Each statement is compiled into a separate block of code
  • Each statement requires loads, computation, then stores
  • A variable may appear in several different registers
  • There may be a lot of redundant loading and storing
  • The object code corresponds straightforwardly to the source code, but it
  • May be unnecessarily long
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27
Q

Describe some charactersitcs of register-variable style

A
  • The instructions corresponding to the statements are mixed together
  • Some statements are executed entirely in the registers
  • A variable is kept in the same register across many statements
  • The use of loads and stores is minimised
  • The object code is concise, but it’s harder to see how it corresponds to the source code
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28
Q

Describe basic Memory Allocation

A
  • The operating system maintains a map of the entire memory, organised as a set of blocks
  • A running program often needs to allocate a block of memory dynamically
  • When a program requests memory, it asks for a block of the size that it needs, and the operating system returns with the address of a block
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29
Q

Describe static variables

A

The lifetime of a static variable is the entire execution of a program

  • When the program is launched, its static variables are created
  • They continue to exist, and to retain their values, until the program is terminated
30
Q

Describe static-varibales in a data segment

A
  • The variables are not placed in memory right after the instructions
  • The program makes a request to the operating system to allocate a block of memory for data (the static data segment)
  • A register is dedicated to point to the static data segment
  • Variables are accessed using the static data segment register
31
Q

Describe dynamic varibales

A
  • A dynamic variable is created explicitly (e.g. using new in Java)
  • It is not limited to use in just one function
  • The lifetime of a dynamic variable does not need to follow the order that stack frames are pushed or popped
  • So dynamic variables can’t be kept in the static data segment, and they can’t be kept on the stack
32
Q

Describe the Heap

A
  • Dynamic variables have a region of memory called the heap
  • The heap typically contains a very large number of very small objects
  • The heap contains a free space list, a data structure that points to all the free words of memory
  • The heap is maintained by the language “runtime system”, not by the operating system
  • When the object is no longer required, the memory used to hold it is linked back into the free space list.
33
Q

The instruction set of a computer is…

A
  • The interface between the compilers and the architecture
  • The interface between the operating system and the architecture
  • The interface between the architecture and the digital circuit that implements it
34
Q

Describe some characterisitics of ISA’s

A
  • Intended application area
  • Organisation of memory
  • Types of instructions
  • Endianness
  • Conventions for calling procedures
  • Stacks
35
Q

Describe CISC architectures

A
  • The aim was to support high level operations directly in the hardware
  • Combine arithmetic with memory access
  • Contain more than one memory access
  • Perform several operations at once
  • Support many addressing modes
  • Correspond directly to constructs in high level programming languages
36
Q

What are some characteristics of CISC

A
  • Small set of registers
  • Instructions have some operands in memory, others in registers
  • Rich instructions, performing several operations; often including both memory access and calculation
  • Convenient for assembly language programmer
37
Q

What are some problems with CISC?

A
  • As memory became plentiful, the advantage of encoding sequences of operations in a single instruction diminished
  • The control algorithms became very large and costly
  • The irregular sequence of datapath operations made further optimisations less effective
  • The complex instructions were less useful than hoped
  • Some of the complex operations slowed down the clock
38
Q

Principles of RISC architecture

A
  • Focus on speed (not programming style)
  • Focus on total execution time (not time of individual instructions)
  • Keep clock speed fast
  • Rely on compiler to optimise code
39
Q

What are Wulf’s Guidelines?

A
  • Regularity, If something is done in one way in one place, it ought to be done the same way everywhere
  • Orthongonality, It should be possible to divide the machine definition (or language definition) into a set of separate concerns and define each in isolation from the others
  • Composability, It should also be possible to compose the orthogonal, regular notions in arbitrary ways
40
Q

What are some characteristics of RISC?

A
  • Register file: Many variables can be kept in registers, reducing memory accesses
  • Load/store access to memory: RX instructions require time to perform memory access, so they don’t also do additional work
  • Calculation instructions use only registers: Calculations require time, so they aren’t mixed with memory access
  • The compiler does extensive analysis to determine which variables to put in registers and when to load/store them
  • Instructions take about the same amount of time (good for pipelining) The program can be optimised to reduce memory accesses
41
Q

What is the key difference in memory operands between RISC and CISC?

A

A CISC instruction may have operands in registers and other operands in memory

A RISC instruction is either load/store, or has all operands in registers

42
Q

Describe advantages and disadvantages of Hardware Stack

(CISC and microcontrollers)

A

Advantage

  • Simpler assembly language
  • Efficient execution when the needs of the subroutine match the instructions

Disadvantage

  • Te architecture supports only one style of subroutine, which may not work well with all programming languages
  • Prevents the compiler from some optimisations
43
Q

Describe advantages and disadvantages of software stack

(RISC)

A

Advantage

  • Keeps instruction set small and fast
  • Allows compiler optimisations

Disadvantage

  • Makes the code larger
  • Complicates writing assembly language (but compilers solve this)
44
Q

What architectures do and do not support procedure calls in hardware?

A
  • CISC/ Microcontrollers do, simplifies programming and reduces size of the executeable program
  • RISC(and some CISC) don’t and require to be handled in software, This is more work at assembly level but is better suited for optimisation
45
Q

Describe the main difference between Hardvard and Princeton architecture

A

Hardvard has two memories, one for program and the other for data

Princeton has single large memory that holds both program and data

46
Q

Describe some characterisitcs of Harvard architecture

A
  • Used in microcontrollers
  • Tpically, the memories are small and both are on the same chip as the processor
  • Program memory can be non-volatile, so the system works immediately when it’s powered up
  • An operating system isn’t needed
  • The word size for instructions and data can be different
  • Easy to guarantee that ordinary instructions don’t corrupt the program
47
Q

Describe some characteristics of the Princeton architecture

A
  • Used in ordinary (general purpose) computers
  • Memory is large (several chips), not integrated with processor
  • Needed for flexibility in operating systems and interactive programming languages
  • The program memory must be quickly readable and writable, so both the program and data need the same memory characteristics
  • The operating system needs to treat instructions as data, so this architecture needs no special instruction-handling instructions for the OS
48
Q

Describe the PIC Microcontroller

A
  • Popular and low cost
  • There is a set of registers that hold a small stack, separate from the register file
  • The stack pointer register points to the top of the stack in this small memory
  • There are special instructions to call a subroutine, and return (unlike RISC, where an ordinary JUMP is used to return)
  • This provides very easy implementation in assembly language of small subroutines for small programs
49
Q

What is an object model?

A
  • Machine language code and data, expressed as hexadecimal constants
  • An object module is a list of addresses along with data (hexadecimal constants) to be loaded at the address
50
Q

What is Static linking?

A
  • A new file is created that contains the code in all the object modules, and all the external names are resolved
  • The executable module can be launched, and the object modules can be discarded
51
Q

What is Dynamic linking?

A
  • The object modules aren’t linked together until the program is launced
  • An “executable” module can’t be executed unless its “dynamic link library” can be found
  • The operating system builds a table of external names and their corresponding addresses
  • Calls to external procedures are performed by looking up the address in that table
52
Q

What are the advantages with static linking?

A
  • Produces a standalone executable file that can be launched
  • Does not require retaining the object modules
  • The program is still executable even if any of the libraries it uses becomes unavailable
53
Q

What are the disadvantages of static linking?

A
  • Object modules that are used by several different programs will be duplicated
  • If the libraries are large, the executables will be too (this happens especially with GUI libraries)
  • If a library procedure is improved (e.g., debugged), resulting in a new version, the linked executable will still be using the old version
54
Q

What are the advantages of dynamic linking?

A
  • Only one copy is needed for shared library procedures
  • If a library procedure is updated, its improvements will automatically be available to all the programs that call it
55
Q

What are the disadvantages of dynamic linking?

A
  • An executable program can’t be guaranteed to work
  • If a library is uninstalled, many programs may cease to function
  • A change to a library procedure may interact badly with a program that calls the procedure, so programs can stop working correctly after other software is updated
  • It may be difficult to locate a library, and this causes problems when a program is launched, not when it is linked
56
Q

What is the hierarchy of memory from small and fast to large and slow?

A
  1. Registers
  2. Cache
  3. Main memory RAM
  4. Disk/SSD
  5. Bulk memory (tapes/NAS/Blu-Ray)
  6. Offline memory (External drives/flash disks)
57
Q

Large memory is slower than slow memory because?

A

The larger the memory, the more address bits are needed increasing the time needed to decode the address

58
Q

What is the aim of Cache memory?

A
  • Make common cases fast
  • Keep recently accessed data in the cache
  • High probability that a memory acess will refer to data already in the cache
59
Q

Each location in cache contains three parts which are…

A
  1. A word of data
  2. A valid bit (set if data is not empty, uset otherwise)
  3. A tag (the actual address in memory)
60
Q

On every memory access, the hardware checks the address against the tags in the cache in parallel…

A
  • If the address refers to data in the cache, it is a cache hit (data is retrieved very quickly at processor speed)
  • Otherwise its a cahce miss (an access to primary memory is perfromed)
61
Q

What is a direct mapped cache?

A
  • Simplest approach to finding the location of a word in the cache
  • Each main memory address can be located in only one cache line
  • Every word in the address space whose low order k bits are x is mapped to location x in the cache
62
Q

What is a fully associative cache?

A
  • Each location has some logic as well as state
  • On a memory access, the tag value is broadcast
  • In parallel, each location compares the broadcast field (tag) with its local field value, resulting in a Boolean match
  • A tree of or-gates can determine in logarithmic time whether a match exists
  • If there are multiple matches, a tree circuit can also determine a unique responder in logarithmic time
63
Q

What is set-associative cache?

A
  • Instead of allowing a block of memory to go into any location of the cache, restrict it to just a subset S of the cache locations
  • This reduces the number of comparators needed to check tags, and the size of the tree circuit to resolve matches
  • Many real machines use set associative cache
64
Q

What is an Interrupt Handler?

A

An interrupt handler is the code jumped to on an interrupt

  1. Saves the state of the process
  2. Records the cause of the interrupt
  3. Jumps to the process scheduler
65
Q

What is masking off interupts?

A

An interrupt has just occurred, and then another interrupt occurs before the handler has time to save state

We disable the interupt

A quick part to be executed with interrupts disabled

  • Save state
  • Record the cause of the interrupt (just a few instructions)

Interrupts enabled

  • Actually service the cause of the interrupt
  • This may be implemented as part of the scheduler, or even a thread in theOS
66
Q

What are privileged instructions?

A

Instructions that include all input/output, control of virtual memory system, control of interrupt handling, etc.

A user can’t execute these instructions, instead the user requests the OS to do it (like a trap)

67
Q

What are some principles of virtual memory?

A
  • Lets a process have a large region of memory allocated
  • The inactive portions of memory are kept on disk (so it can be big)
  • The active portions are kept in RAM (so access is fast)
68
Q

Cahce and virtual memory are similar in that…

A

Cache mediates between registers and RAM

Virtual memory meditates between RAM and disk

69
Q

What is a Page table?

A

The operating system maintains a page table for each address space

Each entry includes

  1. A boolean Resident: Defines whether the corresponding page is in a frame in memory (true) or on disk (false)
  2. A frame address: If Resident=true, this contains the physical address in memory of the frame that contains the page
70
Q

How can virtual memory be fast enough?

A
  • In the real world, programs perform almost all their memory accesses at addresses close to where they recently accessed data
  • Page faults occur when a program changes its working set (e.g. when a method has finished, and calls another)
  • Ocassionaly if a program has too many page faults, this is called thrashing
71
Q

Explain simple memory protection techniques

A
  • Processor has two additional registers, BR (base register) and LR (limit register)
  • When the scheduler gives a time slice to a process, it sets BR and LR to the start and end of the memory area belonging to the process
  • Whenever the control algorithm is about to access memory, it checks the condition br ≤ effective address ≤ lr
72
Q

What are some benefits of virtual memory?

A
  • Easier and more efficient than manual techniques (overlay)
  • It reduces the need for “relocating” machine language programs (each program can be written as if it’s in memory starting at location 0)
  • Virtual memory supports sharing of data among processes
  • A process can be allocated a large region of memory, more than there is RAM (although this usually isn’t done)
  • It provides memory protection

Computing (5 decks)

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