Computer science

Question 1

What control lines are buses made up from?

Answer 1

Memory read and write
Bus request and grant
Clock
Reset

Question 2

Explain briefly how the width of the data bus affects system performance.

Answer 2

If the data bus is 16 bits and a computer word is 32 bits, the processor will have to access memory twice to fetch data or instructions. This will have a detrimental effect on performance.

Question 3

Explain briefly the relationship between the width of the address bus and the maximum possible memory capacity of a computer system.

Answer 3

The width of the address bus determines the maximum address that can be accessed. e.g. an address bus of 32 bits means that 232 addresses can be accessed – that’s 4GiB.

Question 4

Explain what is meant by the stored program concept.

Answer 4

• Instructions and data are stored in the main memory of the computer
• Processor fetches, decodes and executes these instructions…
• …in sequential order
• Programs can be moved in and out of memory.

Question 5

The Fetch-Decode-Execute cycle describes the sequence of operations involved in executing instructions. Several registers are involved in this cycle. With reference to these registers, describe the Fetch phase of the cycle.

Answer 5

• Address of the next instruction copied from the PC (program counter) to the MAR (memory address register)
• Instructions held at that address are sent via the data bus…
• to the MDR (memory data register)
• Simultaneously, PC is updated so that it holds the address of the next instruction
• Contents of MDR are copied via the data bus…
• to the CIR (current instruction register)