Computer Organisation and Architecture Flashcards
The processor
The computer processor executes program instructions to run applications
Main memory
The main memory is used to store program instructions and and frequently used data
It is much faster than secondary storage so storing frequently used data in RAM or ROM helps the
processor to execute instructions quickly
RAM and ROM
RAM is Random Access Memory - it is volatile and can be accessed directly with the same access time for all read/write operations
- Its used as a store for currently running programs
ROM is Read Only Memory - it is non-volatile, meaning its contents aren’t lost when the power supply is turned off
- Its used to store programs and data that are needed as soon as the computer is turned on
Buses
Buses are parallel wires that transfer signals between the internal components of the processor
Address bus
The address bus is a one way bus used to transfer memory addresses and I/O locations
It goes out of the processor to other components
Wider address bus = more memory can be accessed as once
Each additional wire doubles the number of possible addresses that can be accessed
Data bus
The data bus is a two way bus that transfers between the various components
It is one way out of the input controllers to other components and is one way into output controllers from other components
Wider data bus = more data can be transferred at once
Control bus
The control bus is a two way bus that transports control signals such as memory read/write, interrupts and timing signals
The stored program concept
The stored program concept states that:
- A computer program must be resident in the main memory to be executed
- Machine code instructions are fetched from the main memory, decoded and executed by the processor one by one in sequence
- The program in main memory may be replaced with another program at any time
The processor is instructed to perform arithmetic and logical operations - these are represented by machine code instruction
Processor components
- Arithmetic logic unit = Performs arithmetic and logical operations on data
- Control unit=
Controls the various components of the
processor, as well as the fetch-decode-execute cycle - The clock = Supplies a timing signal at a fixed rate. These signals are used to regulate the rate at which instructions are executed and to sync the operation of computer components
Registers
Registers are very fast memory locations inside the processor or I/O controller
General purpose registers don’t have a specific role and can be used as storage for any data that is
required by instructions during execution
Dedicated registers do have a specific role
Dedicated registers
- Program Counter = Holds the memory address of the next instruction to be fetched from main memory
- Memory Address Register = Holds the address of the memory location currently being accessed by the processor
- Memory Buffer Register = Holds the data item being transferred to and from the memory location being accessed by the processor
- Current Instruction Register = Stores a copy of the current instruction, both operand and op-code while it is being decoded and executed
- Status Register = Holds condition codes to indicate the outcome of operations
Fetch-Decode-Execute cycle: Fetch
1) The content of the PC is copied to the MAR
2) The content of the MAR is transferred to main memory by the address bus
3) The instruction is sent from main memory to the MBR by the data bus
4) The PC is incremented by one
5) The content of the MBR is copied to the CIR
Fetch-Decode-Execute cycle: Decode
1) The content of the CIR is decoded by the control unit
2) The decoded instruction is split into two parts: opcode
and operands
Fetch-Decode-Execute cycle: Execute
1) Any data required by the instruction that isn’t present in registers is fetched
2) The instruction is carried out
3) Results of any calculations are stored in general purpose registers or main memory
Interrupts
An interrupt is a signal from some device that is seeking the attention of the processor
They can be caused by program errors (arithmetic overflow) and I/O controllers (data transfer completion)
When an interrupt occurs, it is detected as a change in the content of the status register
between the execute and fetch stages of the fetch-execute cycle