Computer Hardware Flashcards
(42 cards)
What is an integrated circuit
Millions of transistors interconnected by microscopic wires. A CPU is an example of an integrated circuit
How are CPUs made?
Hundreds of copies of the same integrated circuit are etched onto a wafer of silicon. These copies are tested, and each error-free copy is cut (diced) from the wafer, and called a die. Error-free dies are mounted in a package with the die’s pads connected to the package pins.
How do multi-core processors work?
Multiple independent cores (CPUs) are manufactured on the same integrated circuit
What is Moore’s Law?
Transistor capacity/density doubles every 18-24 months. Power dissipation is a problem, with power required being proportional to the number of transistors switched x the frequency of switching (clock speed)
If we are given a function f(x0, x1, x2, …, xN) : {0, 1}^n => {0, 1}^m, then…
We can build a circuit that computes f using only AND, OR and NOT gates
What does the datapath on a processor do?
Performs data processing operations
Includes the arithmetic logic unit, and registers
What does the control part of a processor do?
Tells the datapath, memory and I/O devices what to do
What is the cache?
Small, fast, relatively expensive on-chip memory
What is the von Neumann architecture?
It means that the program and its data both share the same memory (e.g. Little Man Computer), allowing for self-modifying programs
What is the von Neumann bottleneck?
The limitation of the data transfer rate between the CPU and memory. It led to the use of cache
What is the Harvard architecture?
Instruction memory and data memory are separated, each with their own buses, doubling data bandwidth
What does memory consist of?
Pigeon-holes containing data, each holding 8 bits and having a unique address
Address bus
Carries an address, width determines size of addressable memory
Data bus
Carries contents of memory, width determines the word size
Control bus
Deals with information transfer, specifies whether data is being read or written, signals to input/output devices
External storage, RAM, cache
External storage: cheap, slow, far from the CPU
RAM: Each bit is stored by a capacitor, somewhat slow and cheap, must be refreshed by the memory controller
Cache: expensive, fast, split into Level 1 (small, fast, in the CPU) and Level 2 (slightly larger and slower, either in the CPU or a short distance away), and Level 3. These need to be refreshed
CPU manufacturing process
Start with a silicon ingot
Slicer turns it into thin wafers
Etch the IC onto the wafers
Test the wafers to determine which parts are defective
Dice the wafers up and throw away the dies previously found to be defective
Bond die to package
Packaged dies
Part tester
Tested packaged dies
What do we use transistors for?
Building gates which take binary inputs (voltage/no voltage) and produce binary outputs
Describe a half-adder
Output: Sum = (A OR B) AND NOT(A AND B) = A XOR B
Output: Carry = A AND B
1+1 = 0 with carry
Carry + 0 + 0 = 1
Carry + anything else = results in carry
Describe an adder
Made up of two half-adders
Overall input: A, B, Carry in
First adder input: A, B
First adder output: S1, C1
Second adder input: Carry, S1
Output: S2, (C1 OR C2)
What is the modified Harvard architecture?
CPU cache is separated into data cache and instruction cache, with more space for data. Before, data was kicking instructions out.
FETCH, decode, fetch, execute (instruction fetch)
CPU sends value of Program Counter to Address Bus
Memory puts contents at this memory address on the data bus
Instruction is stored in the CPU’s Instruction Registers
fetch, DECODE, fetch, execute
The instruction word in the Instruction Registers is decoded by internal logic to provide control signals to ALU and other internal circuits inside the CPU
Program counter value pushed onto Address Bus, the ALU picks it up, increments it by the word size and puts it back into the Program Counter
fetch, decode, FETCH, execute (operand fetch)
The instruction registers send the address of the data to be processed (operand address), to the address bus
Memory supplies the operand data to the data bus, and it goes to the ALU ready for processing
