Computer architecture and the fetch-execute cycle Flashcards

Syallabus: 1.3.2

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1
Q

Briefly decribe the stored program concept

A

Program instructions and data are stored in main memory and instructions are fetched and executed one after another

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2
Q

What is the Von Neumann architecture?

A

Von Neumann architecture is the model used as the structure in computer systems, consisting of:

  • inputs and outputs
  • memory (such as RAM)
  • the control unit (CU)
  • the arithmetic logic unit (ALU)
  • buses
  • registers

Von Neumann architecture is a sequential processing machine, that is, tasks are carried out one at a time.

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3
Q

What is the fetch-execute cycle?

A

The fetch-execute cycle describes the basic steps a CPU carries out to process an instruction.

  1. Fetch
  2. Decode
  3. Execute
  4. Reset
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4
Q

Describe the following component used in the Von Neumann model:

program counter (PC)

A

An enlarging counter that keeps track of the memory address of the instruction that is to be executed next

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5
Q

Describe the following component used in the Von Neumann model:

memory address register (MAR)

A

Holds the address of a memory block to be read from or written to

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6
Q

Explain the following component used in the Von Neumann model:

instruction register

A

A temporary holding ground for the instruction that has just been fetched from memory

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7
Q

Describe the following component used in the Von Neumann model:

control unit (CU)

A

Decodes the program instruction in the IR, selecting machine resources such as a data source register and a particular arithmetic operation, and coordinates activation of those resources

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8
Q

Describe the following component used in the Von Neumann model:

arithmetic logic unit (ALU)

A

Performs mathematical and logical operations

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9
Q

What are buses?

A
  • A bus is a communication system that transfers data between components inside a computer, or between computers
  • They transport binary data encoded as electrical signals
  • The main buses in the Von Neumann model are the address bus, data bus and control bus
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10
Q

Describe the stages of the ‘fetch’ part of the fetch-execute cyle

A
  1. The Program Counter copies the address of the next instruction it contains into the Memory Address Register (MAR).
  2. The Memory Address Register places the address to be used on to the ‘Address Bus’.
  3. The Memory Address Register triggers a ‘read’ signal that causes main memory (RAM) to place the instruction being asked for on to the ‘Data Bus’.
  4. The instruction on the data bus is loaded into the Memory Data Register (also called Memory Buffer Register).
  5. The Memory Data register copies the instruction into the ‘Instruction Register’.
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11
Q

Describe the ‘decode’ stage of the fetch-excute cycle

A

The instruction gets interpreted, signals produced to control other internal components

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12
Q

Describe the ‘execute’ stage of the fetch-execute cycle

A
  • The instruction within the instruction register is completed by the CPU and is stored in another register.
  • The part that executes instructions is called the execute unit.
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13
Q

Describe the importance of the ‘reset’ stage of the fetch-execute cycle

A

The program counter needs to be reset to point to the next instruction to be fetched, else the computer would not be able to carry out any more instructions.

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