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A level Comp Sci > Computer Architecture > Flashcards

Computer Architecture Flashcards

1
Q

What are the core components of the three box model

A
  • The processor, the main memory and input/output controllers, connected by high speed communication system buses
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2
Q

The Processor

A
  • Sometimes referred to as the CPU (central processing unit) processes data by executing program instructions.
  • At processor level, these will be low-level instructions in the form of machine code that the processor has been designed to handle based on a specific processor instruction set
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3
Q

The Main Memory

A
  • Main memory is memory that can be accessed directly by the processor.
  • Each memory location (instructions/data stored as binary sequences), has a physical address, used to locate it and its content.
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4
Q

What are the two main types of memory

A
  • RAM (Random Access Memory) : The working memory that is used by the processor during the Fetch-Decode-Execute cycle. It is volatile
  • ROM (Read Only Memory) : Memory which is used in the boot process for the computer system. It is non-volatile
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5
Q

How is main memory distinct from secondary storage in terms of the processor?

A
  • The processor can’t work directly with secondary storage. As it must be accessed through I/O controllers.
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6
Q

what are I/O devices (3 types) and how do they work?

A

External (peripheral) devices that can be categorised into 3 groups:

  • Secondary storage devices e.g. hard disk
  • Input devices e.g. a keyboard/sensor
  • Output devices e.g. a speaker/actuator

Each peripheral also has a device driver that provides a software interface for the device

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7
Q

I/O Controller mechanisms

A
  • Input data to be received for processing input devices, such as keyboards
  • The results of computation to be output from the system to the output devices, such as display screens
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8
Q

How is an I/O controller described?

A
  • I/O Controller can be described as an interface between the core computer system and its peripherals.
  • They provide a set of addressable registers that the CPU can access to communicate with the I/O devices.
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9
Q

physical port

A

provides a connection for the peripheral

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10
Q

what does the I/O circuitry do?

A
  • facilitates the exchange of data between device and peripheral devices
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11
Q

Bus

A
  • A series of parallel wires that connect internal components of a computer system, allowing signals to be passed through them
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12
Q

Bus Width

A
  • The number of parallel wires in a bus has a direct relationship to the number of bits that can be transferred.
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13
Q

Address Bus

A

Unidirectional
———–>
(away from CPU)

  • Transports memory addresses
  • Bigger width = larger range of addresses thus - increasing the computers amount of addressable memory
  • 1 wire = 2^1 addresses
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14
Q

What is the Data Bus?

A

Bidirectional
main memory ←———–> processor

  • Sends data and instructions
  • Bigger width = larger volume of data transfer
  • 1 wire = 1 bit
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15
Q

What is the Control Bus?

A

Bidirectional
Main memory ←———–>CPU(Processor)

  • Carries control signals to regulate operations
  • Higher clock speed (a control signal) = More instructions per second + higher temp/power consumption
  • can control Clock, memory read/write
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16
Q

How is the Von Neumann Architecture structured?

A
  • All data/instructions are stored in the main memory
  • Instructions are sent to the processor along the system bus to be executed
  • Data sent to/from the processor is sent along the system bus
  • Any input/output is performed by i/o devices with the data travelling from them to the cpu/main memory
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17
Q

Harvard Architecture

A
  • The main difference to the Vonn Neumann Architecture is it has separate buses for data and instructions, making it more efficient and faster
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18
Q

What is the Stored Program Concept?

A
  • machine code instructions stored in main memory are fetched and executed serially by a processor that performs arithmetic and logical operations.
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19
Q

Embedded Application

A
  • Software that is placed permanently inside some kind of device to perform a very specific set of instructions
20
Q

What is the act of Digital Signal Processing?

A
  • Taking real world signals like voice, audio, video, temperature that has been digitised and then mathematically manipulating them.
21
Q

Examples of real time embedded systems?

A
  • Real time embedded systems examples: GPS, Smart Phones, Smart TVs and traffic monitoring systems
22
Q

Explain the processor(CPU) components (ALU, Control Unit, Bus, Clock)

A
  • ALU - carries out the arithmetic and logical operations required
  • Control Unit - this decides what is supposed to happen and tells the memory, ALU and other devices what they are expected to do.
  • Bus - a collection of wires through which data is transmitted from one component to another.
  • Clock - a signal which is used to synchronize everything inside a computer.
23
Q

ALU

A

Arithmetic logic unit performs arithmetic and logic operations, all mathematical operations are

24
Q

Control Unit

A

Controls the various components of the processor, controls the FDC cycle

25
Q

What are Registers?

A
  • Very small storage locations used to hold data temporarily
  • They have very high read/write speeds
26
Q

Clock

A
  • A system clock that generates a timing signal which changes at a regular frequency.
  • It synchronises info between the CPU components and the system
27
Q

List the special purpose registers

A
  1. Program counter (PC)
  2. Current instruction register (CIR)
  3. Memory address register (MAR)
  4. Status register (SR)
28
Q

Program counter (PC)

A
  • Used to hold the memory address of the next
    instruction to be executed in the fetch-execute cycle
29
Q

Current instruction register (CIR)

A

Holds the instruction that is currently being executed by the processor.

30
Q

Memory address register (MAR)

A

Stores the memory address of a memory location that is to be read from or written to.

31
Q

what is the Memory buffer/data register (MBR/MDR)?

A
  • Also called the memory data register (MDR).
  • Holds the contents of a memory location that has been read from or data that is to be stored.
32
Q

Status register (SR)

A
  • Contains a number of bits, the values of which can change to indicate the occurrence of an interrupt.
33
Q

Describe the Fetch, Decode, Execute cycle.

A

FETCH

    1. The content of the PC is copied into the MAR
      (PC —> MAR)
    1. The contents of the MAR is transferred to main memory by the address bus
      (MAR —Address bus—> MM)
    1. The instructions from MM are sent to the MBR/MDR by data bus simultaneously
      (MM —data bus—> MBR)
    1. The program counter is incremented by 1
      (PC +1)
    1. The content of the MBR is copied to the Current Instruction Register (MBR -> CIR)

DECODE

    1. The content of the CIR is decoded by the control unit
    1. The decoded instruction is split into opcode + operand

EXECUTE

    1. Any data required by the instruction that isn’t present in registers is fetched
    1. The instruction is carried out
    1. Results of any calculations are stored in general purpose registers, main memory or an accumulator (e.g. ALU for arithmetic calculators)
34
Q

Vectored Interrupt Method

A
  1. When an interrupt occurs, the processor stops executing and places the contents of its registers onto the system stack in order to save the volatile environment
  2. When the progress is saved onto the system stack, it loads the appropriate interrupt service routine
  3. When finished, it restores the volatile environment from the system stack and resumes the execution of any previously running programs
35
Q

Opcode

A

Specifies the operation

36
Q

Operands

A

Data on which the operation is performed

37
Q

Addressing mode

A

At the end of the opcode, tells the computer how to treat the operand

38
Q

Immediate Addressing

A

the value specified is to be treated as the actual value e.g. operand 18 is operation number 18

39
Q

Direct Addressing

A

the value signifies a memory address e.g. if the operand was 18, the value would be whatever the content of memory location 18 is.

40
Q

Multicore

A

Computers with more than one processing unit(core) on the CPU e.g. a quad core system has 4 processing units

41
Q

Benefits of Multicore?

A
  • More cores means that more instructions can be executed at the same time and therefore the computer performs more efficiently
  • e.g. dividing a computation into subtasks that can be processed one per core at the same time (parallel processing)
42
Q

Cache

A
  • Relatively small capacity set of locations that sit close to the processor, used to store instructions and data most frequently used.
  • More cache = More instructions can be queued and carried out

L1 Cache is the smallest and fastest
L2 Cache is shared by cores, but larger or slower
L3 and new L4 Slow but large and sit on or near the processor

43
Q

what is Clock Speed and how does faster clock speed impact the device?

A
  • The clock is an electronic oscillator that produces a signal to synchronise the operation of the processor.
  • Greater clock speed = faster instructions
44
Q

Benefits of more memory?

A
  • Having more memory means that the data and instructions that need to be processed will not have to be fetched from secondary storage - faster
45
Q

What is a Word?

A
  • The processor handles a specific number of bytes on a single unit of data called a word.
  • The number of bits that a word is made of is called word size/length
  • Larger word size = greater amount of data transferred to the CPU in one pass
  • Most often, the data bus width is equal to the system word length

A level Comp Sci (13 decks)

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