Computer architecture

Question 1

What is a chipset

Answer 1

a set of electronic components in an integrated circuit known as a “Data Flow Management System” that manages the data flow between the processor, memory and peripherals

Question 2

Examples of peripherals

Answer 2

Disk drive, keyboard, monitor, solid state drive

Question 3

Xeon chipsets contain what two things?

Answer 3

Memory controller hub and I/O controller hub

Question 4

Memory controller hub is aka

Answer 4

North bridge

Question 5

IO controller hub is aka

Answer 5

South brdge

Question 6

Bus

Answer 6

is a communication system that transfers data between components inside a computer, or between computers. This expression covers all related hardware components (wire, optical fiber, etc.) and software, including communication protocols.[3]

Question 7

Local bus

Answer 7

a computer bus that connects directly, or almost directly, from the central processing unit (CPU) to one or more slots on the expansion bus.

Question 8

What does RAM require?

Answer 8

A constant power supply, since it is a volatile form of memory

Question 9

DIMM stands for

Answer 9

Dual Inline Memory Module

Question 10

DIMM

Answer 10

The physical part of a computer the RAM is in

Question 11

Relationship between DDR, RAM, and DIMM

Answer 11

DDR is a type of RAM stored on a DIMM

Question 12

What does a DIMM look like?

Answer 12

[upload image]

Question 13

DRAM consists of

Answer 13

A transistor and a capacitor that create a memory cell, which represents a single bit

Question 14

IPC

Answer 14

Instructions per clock

Question 15

SMT stands for

Answer 15

Simultaneous multithreading

Question 16

TLB stands for

Answer 16

Translation Lookaside Buffer

Question 17

TLB

Answer 17

a memory cache that is used to reduce the time taken to access a user memory location

Question 18

A TLB is part of what?

Answer 18

The chip’s MMU (memory management unit)

Question 19

Why can a TLB miss be more expensive than a instruction cache miss or data cache miss?

Answer 19

Bc of the need for not just a load from main memory, but a page walk, requiring several memory accesses

Question 20

A CPU has to access memory in what 3 scenarios?

Answer 20

A data-cache miss, an instruction-cache miss, or a TLB miss

Question 21

When does a TLB miss happen?

Answer 21

the desired information itself actually is in a cache, but the information for virtual-to-physical translation is not in a TLB

Question 22

Cache lines are aka

Answer 22

Cache blocks

Question 23

Cache lines

Answer 23

The blocks of fixed size that data is transferred between memory and cache in. Almost always are multiples of 64 bytes, in the sense that a request for a certain byte gets mapped to the block address formed by ignoring the last 6 bits of the address

Question 24

What is significance of TLB cache being part of MMU?

Answer 24

The TLB is not related directly to the CPU caches

Question 25

Pre 2010 hard disk sector size

Answer 25

512 bytes

Question 26

Post 2010 typical hard disk sector size

Answer 26

4096 bytes