Computer and Memory Organization

Question 1

What are the 3 main components of a computer system?

Answer 1

• CPU (central processing unit)
• Main memory
• I/O Devices

Question 2

What is included in the system bus?

Answer 2

• Address bus
• Data bus
• Control bus

Question 3

What does the size of the address bus determine determine?

Answer 3

• The width of the address bus determines how many bytes the processor can access
• Arm has 32-bit address bus
• The amount of physical memory that the processor can addresss is 2³² bytes (4GB)

Question 4

What does the width of the data bus determine?

Answer 4

The width determines the size of data transferried between process / memory

Question 5

What is the control bus and what does it do?

Answer 5

• the control bus consists of a set of control signals
• These signals indicate what type of action is taking place on the system bus
  
  • read/ write
  • interrupt request
  • interrupt acklnowledge
  • bus request
  • bus grant

Question 6

What is bus congestion?

Answer 6

• If the processor and I/O wants to access the memroy at the same time
• only one device can access the memory and the other access request must be suspended until the cycle is completed

Question 7

What is the program counter?

Answer 7

A special register which saves the address of the first instruction

Question 8

What are the different levels of memory organization and which is the fastest?

Answer 8

1. CPPU regusters
2. Cache memory
3. Main memory
4. Secondary storage

1 ->4 most expensive to least expensive

1-> 4 fastest processing to slowest processing

Question 9

What is byte addressable memory?

Answer 9

Each byte can be identified by its sequene number starting with zero

Question 10

How many bits do the ARM Addresses require?

Answer 10

32 addresses x 8 bits = 256bits required for the addresses.

Question 11

Hows does the number of address lines impact the size of memory?

Answer 11

Each word in the memory is assigned an identification number, the selection of a specific word inside memory is done by applying the k-bit address to the address lines.

1024 (2¹⁰ or 1K) words requires 10 address bits

4G (2³²) words requires 32 address bits

Question 12

What operations does the memory unit support?

Answer 12

Read and write, bitch!

Question 13

What two metrics are used to categorize memory?

Answer 13

1. Access time: the amount of time required to retreive the addressed location
2. Memory cycle time: the minimum time between succesive memory operations

Question 14

What are the 5 steps of a read cycle?

Answer 14

1. Place the address of the location to be written on the address bus
2. Place the data to be written on the data bus
3. Activate the memory write control signal on the control bus
4. Wait for the memory to store the data
5. Stop the memory write control signal

Question 15

What are the 5 steps of the write cycle?

Answer 15

1. Place the address to be written to on the address bus
2. Place the data to be written on the data bus
3. Activate the memory write control signal on the control bus
4. Wait for the memory to store the data at the addressed llocation
5. Stop the memory write signal

Question 16

What is SRAM

Answer 16

Static RAM

Holds data as long as the source of power is applied

Question 17

What is DRAM?

Answer 17

Dynamic RAM

Complex memory device that uses a capacitor to store a bit. Leaks, so it must be refreshed periodically to charge.

Reading DRAM derstroys the charges on the cells, which makes it a destructive read memory

Question 18

What is little endian

Answer 18

The LSB corresponds to the lowest address number (will be used for this course)

Question 19

What is big endian

Answer 19

The MSB is stored with the lowest address number

Question 20

What are process registers?

Answer 20

• Small memories within the CPU
• The fastest memory type
• The registers are referenced directly by specific instructions or by encoding a register number within a computer instruction

Question 21

What types of process registers are there?

Answer 21

• General Purpose
• Special purpose
  
  • Reserved For System
  • Accessible to user programs
    *

Question 22

What is the instruction execute cycle?

Answer 22

• Fetch (read instruction from memory)
• Decode
• Execute

Question 23

What happens during the fetch cycle?

Answer 23

• Program counter contents > adress bus
• Activate memory read > control bus
• Access time ( wait time during which the memory is read)
• Instruction is placed > data bus
• Processor reads the instruction when it is on the data bus

Question 24

What happens during decoding?

Answer 24

• Segments of the instruction are identified and interpretted
• After decoding the correct control signals are activated
  *

Question 25

What happens during the execute cycle?

Answer 25

• The ALU performs the arithmetic or logical operations on the operands stored in the ALU registers
• The results are then stored
• Then the Fetch process begins again