Components of a Computer Flashcards
Computer (definition)
Electronic device that takes input, processes information using program and delivers output
3 basic steps of the FDE cycle (definitions)
Fetch - bring next instruction to be decoded from RAM to CPU
Decode - inspect instruction to work out components and functions needed
Execute - carry out and complete instructions
What happens in the Fetch stage of the FDE cycle? (5)
PC address copied to MAR
MAR requests data from RAM using address bus
MDR receives data from MAR address
PC increments
MDR copied to CIR
What happens in the Decode stage of the FDE cycle? (3)
Instruction split into opcode and operand to determine instruction type and hardware needed
Copy of data loaded to CPU is given to cache for easy re-access
Addresses written to MAR in preparation for more reading/writing in Execute stage
What can happen in the Execute stage of the FDE cycle? (3)
The opcode is carried out on the operand, which could mean:
A new address is given to the PC
Data is returned through the MDR to RAM
More data fetched for accumulator
Describe the CPU (purpose and parts)
The part of the computer dedicated to processing data and organising execution of instructions. Contains ALU, CU, cache and registers.
What does the ALU do? (3)
Makes logical decisions
Performs arithmetic calculations
Acts as gateway between primary memory and secondary storage
Examples of ALU functions (2)
ADD/SUBTRACT
AND/OR/NOT
What does the CU do? (2)
Directs data flow between processor and other components
Decodes instructions into sequential steps and manages execution + storage of results
What is cache?
High-speed RAM inside CPU used to store small amounts of data likely to be reused
Differences between L1 cache and L2 cache? (3)
L1 has faster transfer rates and more frequently used data, but is smaller and more expensive
L2 has slower transfer rates (still faster than RAM) and less frequently used data, but has larger capacity
What are registers?
Small, high-speed, on-board memory inside CPU, with designated purposes
What does the PC do?
Holds address of next instruction to be executed, either by incrementing or jumping to an address provided by the CIR
What does the CIR do?
Holds current instruction to be executed, divided into operand and opcode
What is the operand?
Data to be manipulated/operated on
What is the opcode?
An instruction to perform on the operand
What does the MAR do?
holds address of current instruction to be fetched/written to
What does the MDR/MBR do?
temporarily holds fetched data/data to be written
What does the ACC do?
holds data being processed by ALU and results of processing
What is a bus? (include capacity)
Set of parallel wires connecting components of a computer; usually 8-64 lines
Describe the system bus (purpose and parts)
Made up of address + data + control buses. A shared transmission medium between CPU, memory and I/O controllers
Describe the address bus (parts and purpose)
Transmits addresses of operands (“words”) from other components to RAM
What is a “word” (when discussing data - include estimated size)
Fixed size group of bits (usually 16-64 depending on the processor) treated as one unit of information and stored at one address
Describe the data bus (parts and purpose)
Bidirectional bus (8-64 lines) for transmitting data and instructions between components that request to use it.
How are processed results written to memory?
The MAR contains the address to write to and the MDR contains the data to write. The address is sent separately through the address bus and the data through the data bus.
Describe the control bus (parts and purpose)
Bidirectional bus which transmits command, timing and specific status information between components to ensure data/address buses are never used conflictingly
Control lines for buses (2)
Bus request = device requests use of data bus
Bus grant = CPU grants access to data bus
Control lines for memory (2)
Memory read = data from an address provided is to be sent through data bus to MDR
Memory write = data sent from MDR is to be written to address provided
Control lines for the CPU (2)
Clock = sent from CU to synchronise all operations
Interrupt request = device requests access to CPU
How does number of cores affect CPU performance?
Each core runs its own FDE cycle so can execute almost twice as many instructions in the same amount of time
Why would doubling CPU cores not double processing speed? (2)
Some processing power is devoted to coordinating cores
Programs that aren’t designed with parallel processing will still only work with one core so performance on that program would not change
How does size of registers affect CPU performance?
Store data/instructions that the CPU is working on, hence more can be worked on at once if multiple processors are working on the same contents.
How does size of RAM affect CPU performance?
Fetching from RAM is faster than fetching from virtual memory, so large RAM will improve performance when a lot of program is in RAM at once
How does clock speed affect CPU performance?
The clock coordinates CPU activities with a crystal transistor. Increasing the clock speed (“overclocking”) will run more FDE cycles per second, but may damage the CPU.
How does data bus size affect CPU performance?
A wider data bus can transmit larger words at once between components, reducing amount of fetches to send an entire program
How does cache size improve CPU performance?
More data in cache = faster access times on the average instruction, reducing overall FDE times
How could a faster CPU lose in benchmark tests to a slower CPU?
Slower CPU has larger cache/RAM
What is important when increasing RAM size?
address bus size must be able to represent binary addresses of every location (one line = 1 bit)
Assembly language (definition)
Low-level programming language which is very similar to the machine code
Mnemonic (definition)
Simple name used to define a computing function
Describe RAM
Volatile memory used to store the instructions/data for all programs currently running that could be needed by the CPU (e.g. apps, OS). Constantly being written to/read from.
Describe ROM
Non-volatile flash memory store of basic programs such as BIOS
What does BIOS do? (3)
Detects hardware, self-checks and copies the loader into RAM to load the OS
What is RISC?
Reduced instruction set computer = uses a small, simplified instruction set. Aims for efficiency and speed through simplicity.
What is CISC?
Complex instruction set computer = has extensive instruction set than can perform multiple operations with one instruction. Prioritises convenience and code density over execution speed
Advantages of RISC (4)
Better instruction throughput as instructions are simple
Deeper and more efficient pipelining
More power efficient
Best for simple, repetitive tasks
Characteristics of RISC (3)
Reduced instruction set
Large number of general purpose registers used directly
Load/store architecture (data must be loaded before it can be acted on)
Advantages/disadvantages of CISC
Larger instruction latencies due to limited pipelining abilities
Longer decoding time as instructions are complex (e.g. multiple operands)
More efficient/easier to code when doing complex tasks as instructions can be represented with less code
Higher power consumption
Characteristics of CISC
Extensive and complex instruction set
Memory is used more for operands than general purpose registers
Can do memory-to-memory operations with more complex addressing modes
What is throughput?
How fast data can undergo a process
What is pipelining?
Efficiency by organising components to maximise use (acting like a production line)
Stored program concept (definition)
Instruction and data stored in the same memory which can be fetched from sequentially by CPU
Characteristics of stored program concept (2)
Program instructions and data are stored in memory, usually with binary code
CPU fetches instructions one by one and executes them sequentially, using the PC to find the next instruction
How does Von Neumann architecture use the stored program concept? Why is it good?
Von Neumann architecture treats instructions like data, allowing program to be written for new tasks and loaded into memory to be executed. This enabled the creation of general purpose computers that could be reprogrammed without rewiring.
What is Von Neumann architecture?
Theoretical framework for a general purpose computer which can be reprogrammed without being rewired
Characteristics of Von Neumann architecture (3)
Unified memory for data and instructions, with addresses to identify each segment
CPU executes instructions, using CU and ALU
Instruction set written in binary and can be executed sequentially by CPU using PC to load
What is Harvard architecture
Theoretical framework for a computer with a specific purpose that DOES NOT USE stored program concept
Characteristics of Harvard architecture (3)
Memory for data and instructions are separate “banks” with their own buses and storage units.
Data memory bank is used exclusively for retrieving and storing data and variables. Program memory/instruction cache is used exclusively for fetching and storing program instructions
Separate, specialised buses for instruction and data allow for efficient and independent transfers
Potential advantages/disadvantages of Harvard architecture over VN architecture (3)
Parallel access = CPU can fetch an instruction from the instruction memory while simultaneously reading/writing data in data memory
Improved fetching and data access times in situations where frequent and concurrent access to data and instructions is needed
Can be more complex than VN architecture due to separate bus systems
Where is Harvard architecture used?
Embedded systems and specialised processors where high-performance data processing is important e.g. microcontrollers and digital signal processor
Multi-core CPU (definition)
Two or more independent processor cores on a single chip
Advantages of a multi-core processor (4)
Better performance when using software designed for parallelism e.g. video games
More energy efficient than increasing clock speed on a single CPU
Improved responsiveness as background tasks can be delegated to other cores, with one core solely focused on user interaction
Number of cores can be scaled to meet performance/efficiency requirements, making design flexible
Parallel processing (definition)
Breaking down a large task into subtasks to be delegated to multiple cores in a CPU
How does parallel processing work?
Task decomposition is used to divide a complex task into subtasks which can be executed independently and concurrently
Where is parallel processing used? By what components? (4 each)
Parallel processing can be done by a multicore CPU, multiple individual CPUs, GPUs, or specialized hardware accelerators.
Its used in scientific computing, data analytics, computer graphics and high-performance computing
What are the two types of parallelism?
Data parallelism - same operation applied to multiple data elements simultaneously
(Used in image processing or numerical simulations)
Task parallelism - executing multiple subtasks concurrently
Advantages of parallel processing (3)
Faster execution when a task can be divided into subtasks
Scalable by adding more processing units
More efficient use of available hardware resources, improving performance
Potential disadvantages of parallel processing (2)
Amdahl’s law = the overall increased speed is limited by sequential portions of the task (things that must be done in an order)
Synchronisation of tasks and management of shared resources is complex
Describe SIMD (meaning, purpose)
Single instruction, multiple data = parallel process where one opcode is done on multiple operand
What is SIMD architecture used for?
Used by GPUs and vector processors for image processing, video encoding and simulations on large datasets as it is efficient for tasks requiring the same operation
Describe MIMD (meaning, purpose)
Multiple instruction, multiple data = independent processing units each with their own PC and instruction stream
Where is MIMD architecture used?
Used in modern multicore CPUs and distributed computing systems for general purpose, scientific simulations, parallel processing of diverse workloads
