Comp organisation and architecture Flashcards

1
Q

Role of processor

A

A device that follows out computation on data by following out instructions

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2
Q

Role of main memory

A

Stores data and instructions that will be used by the processor. It is connected to the processor by several different buses

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3
Q

Types of main memory

A

RAM - Temporary storage space with quick access times
- Volatile (all contents lost when turned off)

ROM - permanent store of data and instructions that can be accessed by the computer
-Not volatile

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4
Q

Uses of RAM

A

Allows programs and software to run
Stores data and instructions needed by processor for FE cycle
Part of OS is loaded in RAM

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5
Q

Uses of ROM

A

Boot program

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6
Q

Buses

A

A set of parallel wires that transmit signals between components, connecting the processor to several I/O controllers

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7
Q

Role of address bus

A
  • Uni directional from PROCESSOR–> MEMORY

- Used to access anything stored in main memory so the data bus can access

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8
Q

Role of data bus

A

Carries data and instructions MemoryProcessor

Bi directional

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9
Q

Role of control bus

A

Carries control signals (timing or memory read/write)

Bi directional

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10
Q

Role of I/O controllers

A
  • Translates between processor and peripherals
  • Buffers data from CPU to device so processor doesn’t have to wait for each device to respond (I/O respond slower to processor)
  • Sends specific control signals to the I/O devices from processor
  • I/O connected to controllers by ports so can exchange data
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11
Q

Von Neumann

A

Technique used for building a processor where…

Data and instructions are stored in the same memory and accessed via buses

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12
Q

Where is von neumann used?

A

General purpose computers

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13
Q

Harvard architecture

A

Uses separate buses and memory for data and instructions

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14
Q

Where is Harvard used?

A

Embedded devices (mobiles, burglar alarms, DSP)
Digital signal processing - real world continuous data compressed to enable faster processing
Microprocessors
Micro controllers

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15
Q

Advantages of Harvard over VN

A

-Data and instructions can be accessed simultaneously and are handled quicker as don’t have to share same bus
-Reduce delays waiting for memory fetches
-Instructions and data can have different word length
-Avoids possibility of data being executed as code, which is one
method that can be exploited by hackers

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16
Q

Addressable memory concept

A

The concept that data and instructions are stored in memory using discrete addresses

17
Q

Stored program concept

A

Machine code instructions stored in main memory are fetched and executed serially by a processor that performs arithmetic and logical operations

18
Q

ALU

A

A component inside the processor which carries out 2 types of operations on data: arithmetic and logic (comparing >

19
Q

Control Unit

A

Supervises fetch-execute cycle

Makes sure all data is sent to right place (ie right register/section of memory)

20
Q

Clock

A

Generates electrical pulse (GHZ) to sychronise components of computer eg FE cycle

21
Q

Registers

A

Small temporary storage in processor

22
Q

Name the dedicated registers in the processor

A

PC - stores memory location of next data/instruction to be fetched
CIR - Stores instruction currently being executed by processor
MAR - Stores memory location where data in MBR is about to be written to/read from
MBR/MDR - Stores data just been read from/ is about to be written from main memory
SR - Keeps track of status of various parts of comp eg If overflow error occurs

23
Q

Fetch Execute Cycle

A

PC contains memory location of next instruction to be fetched
Processor transfers this memory location into MAR, then sent down address bus to main memory
Data/instruction in this location sent down data bus back to processor and into MBR. PC is then incremented by 1
Goes into CIR before control unit, where it is decoded and executed by the relevant part of processor (part of ALU)
SR stores any overflow errors if they were to occur

24
Q

Processor instruction set

A
  • Pattern of 0s and 1s a particular processor recognises
  • The range of instructions a CPU can execute
  • Instruction sets are processor specific
25
Q

LDA #23 which is opcode and which is operand?

A

LDA # opcode includes basic machine operation and addressing mode
23 is opcode - data/address

26
Q

Direct addressing

A

Operand is address location of data

27
Q

Immediate addressing

A

without memory location - operand is the data #