Combinational Logic Flashcards

1
Q

Combinational Circuit:

A

A combinational
circuit consists of logic gates whose outputs at any time are determined from only the
present combination of inputs.
A combinational circuit performs an operation that can
be specified logically by a set of Boolean functions

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2
Q

How is sequential different than combinational:

A

In contrast, sequential circuits
employ storage elements in addition to logic gates.

Their outputs are a function of the
inputs and the state of the storage elements.

Because the state of the storage elements
is a function of previous inputs, the outputs of a sequential circuit depend not only on
present values of inputs, but also on past inputs, and the circuit behavior must be specified by a time sequence of inputs and internal states.

Sequential circuits are the building
blocks of digital systems.

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3
Q

4.2 Combinational Circuits:

Q1) Where does Ip come from and Op goes to and process?

At what point does it bcom sequential?

Ip op numbers:

Expressing Combinational Circuits in other 2 forms:

A
  1. The n input
    binary variables come from an external source; the m output variables are produced by
    the internal combinational logic circuit and go to an external destination.

In many applications, the source and destination are storage registers. If the registers are included with the combinational gates, then the total circuit must be considered to be a sequential circuit.

For n input variables, there are 2^n
possible combinations of the binary inputs. For each
possible input combination, there is one possible value for each output variable.
Thus, a
combinational circuit can be specified with a truth table that lists the output values for
each combination of input variables. A combinational circuit also can be described by
m Boolean functions, one for each output variable. Each output function is expressed
in terms of the n input variables.

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4
Q

Feedback Path?

A

A feedback path is a connection from the output
of one gate to the input of a second gate whose output forms part of the input to the
first gate.
Feedback paths in a digital circuit define a sequential circuit and must be
analyzed by special methods and will not be considered here.

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5
Q

Analysis Of Combinational Circuit:

getting the boolen function

A

The first step in the analysis is to make sure that the given circuit is combinational
and not sequential. The diagram of a combinational circuit has logic gates with no
feedback paths or memory elements .

Then to obtain the output Boolean functions from a logic diagram, we proceed as follows:
1. Label all gate outputs that are a function of input variables with arbitrary symbols—
but with meaningful names. Determine the Boolean functions for each gate output.
2. Label the gates that are a function of input variables and previously labeled gates
with other arbitrary symbols. Find the Boolean functions for these gates.
3. Repeat the process outlined in step 2 until the outputs of the circuit are obtained.
4. By repeated substitution of previously defined functions, obtain the output
Boolean functions in terms of input variables.

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6
Q

Analysis of COmbinatonal Circuit:

Getting the truth Table:

A
  1. Determine the number of input variables in the circuit. For n inputs, form the 2^n
    possible input combinations and list the binary numbers from 0 to (2^(n - 1) ) in a
    table.
  2. Label the outputs of selected gates with arbitrary symbols.
  3. Obtain the truth table for the outputs of those gates which are a function of the
    input variables only.
  4. Proceed to obtain the truth table for the outputs of those gates which are a function of previously defined values until the columns for all outputs are determined.
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7
Q

Design Procedure Steps:

A

The design of combinational circuits starts from the specification of the design objective
and culminates in a logic circuit diagram or a set of Boolean functions from which the
logic diagram can be obtained. The procedure involves the following steps:
1. From the specifications of the circuit, determine the required number of inputs
and outputs and assign a symbol to each.
2. Derive the truth table that defines the required relationship between inputs and
outputs.
3. Obtain the simplified Boolean functions for each output as a function of the input
variables.
4. Draw the logic diagram and verify the correctness of the design

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8
Q

Which Implementation to chose:

A

A practical design must consider such
constraints as the number of gates, number of inputs to a gate, propagation time of
the signal through the gates, number of interconnections, limitations of the driving
capability of each gate (i.e., the number of gates to which the output of the circuit
may be connected), and various other criteria that must be taken into consideration
when designing integrated circuits.

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9
Q

Use of Code Converters:

A

The availability of a large variety of codes for the same discrete elements of information
results in the use of different codes by different digital systems.
It is sometimes necessary
to use the output of one system as the input to another.
A conversion circuit must be
inserted between the two systems if each uses different codes for the same information.

Thus, a code converter is a circuit that makes the two systems compatible even though
each uses a different binary code.

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10
Q

Tips for designing:

A

The expressions obtained in Fig. 4.3 may be manipulated
algebraically for the purpose of using common gates for two or more outputs. This manipulation, shown next, illustrates the flexibility obtained with multiple-output systems when
implemented with three or more levels of gates:

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11
Q

Half adder: (HA)

A

A combinational circuit that performs the addition of 2 bits.
This circuit needs two binary
inputs and two binary outputs. The input variables designate the augend and addend
bits; the output variables produce the sum and carry.
S = x~y + ~xy

C = xy
From truth tables.
Implement logic circuits then

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12
Q

Full Adder: (FA)

A
3 ips , 2 ops.
It can be made of two half adders.
 as
C = AB + BC + AC = AB + C( A xor B)
Make TT and implement it.
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13
Q

Binary Adder:

A
  • Cary generated has significance 1 more than bits being added.
  • to add n bits : chain of n FA with Co = 0 or
    1 HA and n-1 FA.
  • Op carry or n-1 FA is IP carry for nth FA.
  • Design by the classical method would require a truth table with 2^9 = 512 entries, since there
    are nine inputs to the circuit. By using an iterative method of cascading a standard function, it is possible to obtain a simple and straightforward implementation.
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14
Q

Carry propagation :

what is propagation time?

for n- bit adder?

Solution?

A

The total propagation time is equal to the propagation
delay of a typical gate, times the number of gate levels in the circuit.
The longest propagation delay time in an adder is the time it takes the carry to propagate through the full
adders.
For an n -bit adder, there are 2 n gate levels for the
carry to propagate from input to output.

The signal from the input carry Ci to the output
carry Ci+1 propagates through an AND gate and an OR gate, which constitute two gate
levels.

Any combinational circuit will have an Output at all given times but it will not be correct, give time to signal for propagation.

  • decrease gate delay time.
    -Increase complexity.
    ( Carry Lookahead Logic )
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15
Q

Carry lookahead Generator :

A

-Gi (carry generate), and it produces a carry of 1 when both Ai and Bi are 1, regardless of the input carry Ci
-Pi (carry propagate), because it determines
whether a carry into stage i will propagate into stage
i + 1 (i.e., whether an assertion of Ci will propagate to an assertion of Ci+1 ).
- Equations:
G and P in terms of A, B
C in terms of P and G.
- C are SOP so can be implemented by 2-lvl gates.

Recall fig 4.12.

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16
Q

Binary Subtractor :

A
A - B
Unsigned : 
A + ~B + 1 : s complement of B.
A >= B then A-B, if A < B then &amp; is 2s complement of B-A
Signed Complement :
The result is A-B provided no overflow.
17
Q

Binary subtractor implementation:

A
A-B
We add M (mode) as shown in Fig 4.13.
M Xor B is given to FA. C0 = M
M= 0 then Addition, M =1 then Subtraction.
- B XOR 0 = B;    B XOR 1 = ~B
18
Q

Dealing with overflow in Binary subtractor :

UNCOMFORTABLE.
HOW THE HECK DOES SUBTRACTION WORK:

A

If the 2 binary numbers are considered to be unsigned, then the C bit detects a carry after
addition or a borrow after subtraction.
If the numbers are considered to be signed, then
the V bit detects an overflow.
If V = 0 after an addition or subtraction, then no overflow
occurred and the n -bit result is correct. If V = 1, then the result of the operation contains
n + 1 bits, but only the rightmost n bits of the number fit in the space available, so an
overflow has occurred. The (n + 1) th bit is the actual sign and has been shifted out of
position.

19
Q

Decimal adder:

A

Computers or calculators that perform arithmetic operations directly in the decimal
number system represent decimal numbers in binary coded form.

20
Q

BCD Adder

A

Make the TT, Make the circuit.

  • Ranges form 1 -19 … valind invalid.
  • add 6 (0110) if sum greater than 9.
  • Equation of carry

The output carry generated from the bottom adder can be ignored, since it supplies information already available at the output carry
terminal.

21
Q

4.7 Binary Multiplier

A

Left for later, finish clg studies now.

22
Q

Decoders:

A

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