CHAPTER 7: The CPU And Memory Flashcards

1
Q

The Little Man instruction set is based on a decimal number system; real computers encode instructions and data using the

a) binary system.
b) Unicode system.
c) decimal system.
d) algebraic system.

A

a) binary system.

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2
Q

The ALU and CU together are known as the

a) CPU.
b) instruction set.
c) program counter.
d) Memory Management Unit.

A

a) CPU.

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3
Q

The area inside of the CPU that holds data temporarily and performs calculations is called the

a) accumulator.
b) program counter.
c) arithmetic logic unit.
d) Memory Management Unit.

A

c) arithmetic logic unit.

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4
Q

The storage locations that are used for a particular defined purpose within the CPU are called

a) RAM.
b) storage.
c) the bus.
d) registers.

A

d) registers.

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5
Q

The 1-bit registers that are used to allow the computer to keep track of special conditions (like overflow or power failure) are often called

a) flags.
b) loops.
c) the ALU.
d) I/O counters.

A

a) flags.

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6
Q

Loading the value zero into a register is called

a) inverting a register.
b) clearing a register.
c) dumping the register.
d) incrementing a register.

A

b) clearing a register.

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7
Q

The register that holds the address of the memory location that needs to be accessed is called the

a) IR.
b) MAR.
c) MDR.
d) MBR.

A

b) MAR.

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8
Q

The register that holds the current instruction is called the

a) IR.
b) PC.
c) LMC.
d) MBR.

A

a) IR.

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9
Q

The register that will hold the data value that is being transferred between the CPU and a particular memory location is called the

a) PC.
b) ALU.
c) MAR.
d) MDR.

A

d) MDR.

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10
Q

The mailboxes in the LMC model are the equivalent to a real computer’s

a) CPU.
b) ports.
c) memory.
d) control unit.

A

c) memory.

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11
Q

Which of the following is NOT one of the three lines that control the memory cell?

a) Skew line
b) Address line
c) Read/write line
d) Activation line

A

a) Skew line

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12
Q

If the Memory address register is 8 bits wide, the number of possible memory addresses is

a) 8
b) 16
c) 64
d) 256

A

d) 256

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13
Q

Memory that retains its values when power is removed is called

a) DRAM.
b) SRAM.
c) volatile.
d) nonvolatile.

A

d) nonvolatile.

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14
Q

There would never be a reason for an address transfer from the ________ to another register within the CPU.

a) IR
b) PC
c) MAR
d) MDR

A

c) MAR

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15
Q

When the instruction being executed is to store data, the data will be transferred from another register in the CPU to the _____, and from there it will be transferred into memory.

a) IR
b) PC
c) MAR
d) MDR

A

d) MDR

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16
Q

The different ways of establishing memory addresses within an instruction are called

a) MAR codes.
b) MDR codes.
c) addressing modes.
d) programmable modes.

A

c) addressing modes.

17
Q

Flash Memory

a) is volatile.
b) is faster than standard RAM.
c) has unlimited rewrite capacity.
d) is nonvolatile.

A

d) is nonvolatile.

18
Q

The first step in the instruction cycle is

a) clear the accumulator.
b) fetch the instruction from memory.
c) decode the instruction in the accumulator.
d) copy the data from the MAR to the MDR.

A

b) fetch the instruction from memory.

19
Q

The physical connections that make it possible to transfer data from one location in the computer system to another are called

a) flags.
b) fibers.
c) buses.
d) peripherals.

A

c) buses.

20
Q

Optical conductors are

a) faster than electrical conductors.
b) cheaper than electrical conductors.
c) more common than electrical conductors.
d) all of the above.

A

a) faster than electrical conductors.

21
Q

A bus in which there is an individual line for each bit of data, address, and control is called a

a) wide bus.
b) serial bus.
c) parallel bus.
d) dedicated bus.

A

c) parallel bus.

22
Q

A bus that transfers data sequentially, one bit at a time using just a single line pair is called

a) a serial bus.
b) a single bus.
c) a narrow bus.
d) a sequential bus.

A

a) a serial bus.

23
Q

A bus line that is “one-way” is called

a) a simplex bus line.
b) a serial bus line.
c) a one-way bus line.
d) a sequential bus line.

A

a) a simplex bus line.

24
Q

A bus line that can carry data in both directions at the same time is called a

a) simplex bus line.
b) complex bus line.
c) full duplex bus line.
d) half duplex bus line.

A

c) full duplex bus line.

25
Q

The exposed connectors into which external cables can be plugged are often called

a) plugs.
b) lines.
c) ports.
d) stacks.

A

c) ports.

26
Q

A bus that carries signals from a single specific source to a single specific destination is a(n)

a) simplex bus.
b) broadcast bus.
c) Ethernet bus.
d) point-to-point bus.

A

d) point-to-point bus.

27
Q

Virtually every bus internal to the CPU is

a) serial.
b) cables.
c) optical.
d) parallel.

A

d) parallel.

28
Q

Instructions that only the operating system can execute are called

a) system instructions.
b) executive instructions.
c) privileged instructions.
d) administrative instructions.

A

c) privileged instructions.

29
Q

Programs that execute without privileges are said to execute

a) in user space.
b) in data mode.
c) in kernel space.
d) in privilege space.

A

a) in user space.

30
Q

Multimedia applications, like modifying an image, often use

a) PSW instructions.
b) Flash instructions.
c) MMD instructions.
d) SIMD instructions.

A

d) SIMD instructions.

31
Q

The sources and destinations of data for an instruction are known as

a) Op codes.
b) Operands.
c) Op registers.
d) Operation fields.

A

b) Operands.

32
Q

Increasing the number of bits available for the op code in an instruction word

a) increases the demand on the CPU.
b) increases the number of memory locations that can be addressed.
c) increases the number of instructions available in the instruction set.
d) has no impact on any of the above.

A

c) increases the number of instructions available in the instruction set.