CHAPTER 3: Instructions Flashcards

1
Q

instruction set

A

vocabulary of commands understood by a given architecture

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
2
Q

stored-program concept

A

idea that instructions and data of many types can be stored in memory as numbers and thus be easy to change, leading to the stored-program computer

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
3
Q

word

A

natural unit of access in a computer, usually a group of 32 bits

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
4
Q

doubleword

A

another natural unit of access in a computer, usually a group of 64 bits; corresponds to the size of a register in the LEGv8 architecture

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
5
Q

Design Principle 2: Smaller is faster

A
  • a very large number of registers may increase the clock cycle time simply because it takes electronic signals longer when they must travel farther
How well did you know this?
1
Not at all
2
3
4
5
Perfectly
6
Q

data transfer instruction

A

command that moves data between memory and registers

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
7
Q

address

A

value used to delineate the location of a specific data element within a memory array

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
8
Q

data transfer instruction

A

command that moves data between memory and registers

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
9
Q

address

A

value used to delineate the location of a specific data element within a memory array

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
10
Q

memory

A

is just a large, single-dimensional array, with the address acting as the index to that array, starting at 0

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
11
Q

alignment restriction

A

requirement that data be aligned in memory on natural boundaries

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
12
Q

binary number

A
How well did you know this?
1
Not at all
2
3
4
5
Perfectly
13
Q

least significant bit

A

rightmost bit in an LEGv8 doubleword

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
14
Q

most significant bit

A

leftmost bit in an LEGv8 doubleword

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
15
Q

two’s complement

A

signed number representation where a leading 0 indicates a positive number and a leading 1 indicates a negative number. The complement of a value is obtained by complementing each bit (0 → 1 or 1 → 0), and then adding one to the result

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
16
Q

one’s complement

A

notation that represents the most negative value by 10 … 000two and the most positive value by 01 … 11two, leaving an equal number of negatives and positives but ending up with two zeros, one positive (00 … 00two) and one negative (11 … 11two). The term is also used to mean the inversion of every bit in a pattern: 0 to 1 and 1 to 0

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
17
Q

biased notation

A

notation that represents the most negative value by 00 … 000two and the most positive value by 11 … 11two, with 0 typically having the value 10 … 00two, thereby biasing the number such that the number plus the bias has a non-negative representation

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
18
Q

instruction format

A

form of representation of an instruction composed of fields of binary numbers

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
19
Q

machine language

A

binary representation used for communication within a computer system

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
20
Q

hexadecimal

A

Numbers in base 16 that are easy to convert to binary

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
21
Q

opcode

A

field that denotes the operation and format of an instruction

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
22
Q

and

A

logical bit- by-bit operation with two operands that calculates a 1 only if there is a 1 in both operands

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
23
Q

mask

A

“conceals” some bits

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
24
Q

or

A

logical bit-by-bit operation with two operands that calculates a 1 if there is a 1 in either operand

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
25
not
logical bit-by-bit operation with one operand that inverts the bits; that is, it replaces every 1 with a 0, and every 0 with a 1
26
EOR (exclusive or)
logical bit-by-bit operation with two operands that calculates the exclusive OR of the two operands. That is, it calculates a 1 only if the values are different in the two operands
27
conditional branch
instruction that tests a value and that allows for a subsequent transfer of control to a new address in the program based on the outcome of the test
28
basic block
sequence of instructions without branches (except possibly at the end) and without branch targets or branch labels (except possibly at the beginning)
29
branch address table (branch table)
table of addresses of alternative instruction sequences
30
procedure
stored subroutine that performs a specific task based on the parameters with which it is provided
31
branch-and-link instruction
instruction that branches to an address and simultaneously saves the address of the following instruction in a register (LR or X30 in LEGv8)
32
return address
link to the calling site that allows a procedure to return to the proper address; in LEGv8 it is stored in register LR (X30)
33
caller
program that instigates a procedure and provides the necessary parameter values
34
callee
procedure that executes a series of stored instructions based on parameters provided by the caller and then returns control to the caller.
35
program counter (PC)
register containing the address of the instruction in the program being executed.
36
stack
data structure for spilling registers organized as a last-in- first-out queue
37
stack pointer
value denoting the most recently allocated address in a stack that shows where registers should be spilled or where old register values can be found. In LEGv8, it is register SP
38
push
add element to stack
39
pop
remove element from stack
40
global pointer
register that is reserved to point to the static area
41
procedure frame (activation record)
segment of the stack containing a procedure's saved registers and local variables
42
frame pointer
value denoting the location of the saved registers and local variables for a given procedure
43
text segment
segment of a UNIX object file that contains the machine language code for routines in the source file
44
pc-relative addressing
addressing regime in which the address is the sum of the program counter (PC) and a constant in the instruction
45
addressing mode
one of several addressing regimes delimited by their varied use of operands and/or addresses
46
data race
two memory accesses form a data race if they are from different threads to same location, at least one is a write, and they occur one after another
47
assembly language
symbolic language that can be translated into binary machine language
48
pseudoinstruction
common variation of assembly language instructions often treated as if it were an instruction in its own right
49
symbol table
table that matches names of labels to the addresses of the memory words that instructions occupy
50
linker (link editor)
systems program that combines independently assembled machine language programs and resolves all undefined labels into an executable file.
51
executable file
functional program in the format of an object file that contains no unresolved references. It can contain symbol tables and debugging information. A "stripped executable" does not contain that information. Relocation information may be included for the loader
52
loader
systems program that places an object program in main memory so that it is ready to execute
53
dynamically linked libraries (DLL)
library routines that are linked to a program during execution
54
java bytecode
instruction from an instruction set designed to interpret Java programs
55
just in time compiler (JIT)
name commonly given to a compiler that operates at runtime, translating the interpreted code segments into the native code of the computer
56
loop-unrolling
technique to get more performance from loops that access arrays, in which multiple copies of the loop body are made and instructions from different iterations are scheduled together.
57
public
Java keyword that allows a method to be invoked by any other method
58
protected
Java keyword that restricts invocation of a method to other methods in that package
59
package
a directory that contains a group of related classes
60
static method
method that applies to the whole class rather to an individual object. It is unrelated to static in C
61
general purpose register (GPR)
register that can be used for addresses or for data with virtually any instruction
62
fallacy: More powerful instructions mean higher performance
part of the power of the Intel x86 is the prefixes that can modify the execution of the following instruction
63
fallacy: write in assembly language to obtain the highest performance
even if writing by hand resulted in faster code, the dangers of writing in assembly language are the protracted time spent coding and debugging, the loss in portability, and the difficulty of maintaining such code
64
fallacy: the importance of commercial binary compatibility means successful instruction sets don't change
65
pitfall: forgetting that sequential word or doubleword addresses in machines with byte addressing do not differ by one
assembly language programmer has toiled over errors made by assuming that the address of the next word or doubleword can be found by incrementing the address in a register by one instead of by the word or doubleword size in bytes.
66
pitfall: using a pointer to an automatic variable outside its defining procedure
common mistake in dealing with pointers is to pass a result from a procedure that includes a pointer to an array that is local to that procedure
67