Chapter 3: Combinational Logic Design Flashcards

1
Q

What is an universal logic gate?

A

A gate type that alone can be used to implement all possible Boolean functions (it is said to be functionally complete)

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2
Q

What gates are universal gates?

A

The NAND and NOR gates

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3
Q

How can you obtain a NOT gate from a NAND gate?

A

IMAGE

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4
Q

How can you obtain an AND gate from two NAND gates?

A

IMAGE

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5
Q

How can you obtain an OR gate from three NAND gates?

A

IMAGE

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6
Q

What are the three steps to implement a given digital circuit with only NAND gates?

A

1) Replace each AND gate and OR gate with its equivalent circuit using NAND gates and NOT gates
2) Cancel all inverter pairs
3) Replace each inverter with its equivalent NAND gate

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7
Q

What is decoding?

A

The conversion of an n-bit input code to an m-bit output code with n <= m <= 2^n

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8
Q

What is a decoder?

A

A decoder is a combinational circuit with an n-bit binary code applied to its inputs and an m-bit binary code appearing at the outputs

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9
Q

What is a 1-to-2-line decoder?

A

A combinational circuit that decodes the single input 0 to the two outputs 1,0 and the single input 1 to the two outputs 0,1

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10
Q

How can the function, n-to-m-line decoding with enabling, be implemented?

A

By attaching m enabling circuits to the AND gates leading to the decoder outputs

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11
Q

How can you use decoders to form a sum-of-minterms implementation?

A

By using a decoder to generate the minterms and combining them with an external OR gate to form the sum-of-minterms implementation

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12
Q

What is the truth table for a 1-bit binary adder?

A

X Y Z C S
0 0 0 0 0
0 0 1 0 1
0 1 0 0 1
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1

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13
Q

What is an encoder?

A

A digital function that performs the inverse operation of a decoder

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14
Q

How many input lines and output lines does an encoder have?

A

2^n (or fewer) input lines and n output lines

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15
Q

What is a priority encoder?

A

A combinational circuit that implements a priority function, which means if two or more inputs are equal to 1 at the same time, the input having the highest priority takes precedence

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16
Q

What is a multiplexer (MUX)?

A

A combinational circuit that selects binary information from one of many input lines and directs the information to a single output line

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17
Q

How many select inputs does a 2-to-1-line multiplexer need?

A

Only 1

18
Q

Given a 2-to-1-line multiplexer with input I0 and input I1. When is output Y = 1 when S = 0?

A

When S = 0 the output Y is exactly equivalent to the input I0. So, Y is 1 whenever I0 is 1.

19
Q

Given a 2-to-1-line multiplexer with input I0 and input I1. When is output Y = 1 when S = 1?

A

When S = 1 the output Y is exactly equivalent to the input I1. So, Y is 1 whenever I1 is 1.

20
Q

What is the circuit symbol for a multiplexer?

A

IMAGE

21
Q

A multiplexer is also called what?

A

Data selector

22
Q

What kind and how many multiplexers do we need to implement a 1-bit binary adder with them?

A

We need two 8-to-1 multiplexers (implementation with two 4-to-1 multiplexers is also possible)

23
Q

What is an arithmetic circuit?

A

A combinational circuit that performs arithmetic operations such as addition, subtraction, multiplication, and division with binary numbers

24
Q

What is a half adder?

A

A combinational circuit that performs the addition of two bits

25
Q

How does the circuit for a half adder look like?

A

IMAGE

26
Q

What is a full adder?

A

A combinational circuit that performs the arithmetic sum of three input bits (two bits and a carry)

27
Q

What is the Boolean function of the sum bit of a full adder?

A

X XOR Y XOR Z

28
Q

What is the Boolean function of the carry bit of a full adder?

A

Z*(X XOR Y) + XY

29
Q

Why don’t we use the boolean expression XZ + XY + YZ for the carry bit of a full adder in real life implementations even though it is simpler then the Z(X XOR Y) + XY that is used?

A

Because we need to compute X XOR Y anyways for the sum bit

30
Q

What is a parallel binary adder?

A

A digital circuit that produces the arithmetic sum of two binary numbers using only combinational logic

31
Q

Why is the parallel binary adder commonly referred to as a ripple carry adder?

A

Because a 1 carry may appear near the least significant bit of the adder and can propagate through many full adders to the most significant bit, just as a wave ripples outward from a pebble dropped in a pond

32
Q

An n-bit ripple carry adder requires how many full adders?

A

n

33
Q

If a binary number is signed, then the leftmost bit represents what?

A

The sign (+ if 0 and - if 1)

34
Q

How is the signed 1s complement of a binary number obtained?

A

By changing all 1s to 0s and all 0s to 1s

35
Q

How is the signed 2s complement of a binary number obtained?

A

By adding 1 to the 1s complement

36
Q

What is 9 in binary, -9 in 1s complement and -9 in 2s complement?

A

Binary: 1001
1s complement: 0110
2s complement: 0111

37
Q

How do you convert a 2s complement number back to regular binary?

A

1) Do the 1s complement
2) Add 1

38
Q

What happens if overflow occurs when converting to 2s complement?

A

The overflow bit is simply discarded

39
Q

What is the major drawback of signed magnitude number system as opposed to the signed complement number system?

A

The signed magnitude number system has a negative and a positive zero

40
Q

In what special case can we implement a multiplication circuit with only wiring (no gates)?

A

When we multiply a binary number by a constant and the constant is a power of 2

41
Q

Multiplication of a binary number by a binary number which is a power of 2 (2 to the power of some i) is called?

A

Left shift by i positions