Chapter 3 Flashcards
Define a program in computing.
A sequence of steps to perform arithmetic or logical operations, each step controlled by specific signals.
Role of the Control Unit in the CPU.
It issues control signals and interprets operation codes to manage CPU functions like ADD or MOVE commands.
What are the primary CPU registers used in program execution?
PC (Program Counter): Holds the address of the next instruction
- IR (Instruction Register): Holds the current instruction
- MAR (Memory Address Register): Points to memory location for read/write
- MBR (Memory Buffer Register): Holds data for memory exchange
- I/O AR and I/O BR: Manage data exchange with I/O modules
What are the two main steps in the Instruction Cycle?
1) Fetch Cycle: Retrieves the next instruction from memory.
2) Execute Cycle: Performs the operation specified by the instruction.
What happens during the Fetch Cycle?
The PC provides the address of the next instruction, the CPU fetches it into the IR, then increments the PC to the next instruction.
Describe the main actions during the Execute Cycle.
Processor-memory: Transfers data between CPU and memory
- Processor-I/O: Transfers data between CPU and I/O modules
- Data processing: Performs arithmetic or logic operations
- Control: Alters instruction sequence
What is an Interrupt, and why is it used?
An interrupt is a signal that halts the CPU’s current task to handle external events, ensuring devices get timely responses without CPU downtime.
List the main types of Interrupts.
Program: Arises from software errors or instructions
- Timer: From internal clock
- I/O: From devices needing CPU attention
- Hardware failure: Emergency issues like power loss
Steps of Interrupt Handling.
Save current program state, transfer control to interrupt handler, process interrupt, restore state, and resume the original program.
Explain Direct Memory Access (DMA).
DMA allows I/O devices to transfer data directly to/from memory without CPU intervention, freeing the CPU for other tasks.
What is the function of a System Bus?
It connects major components like CPU, memory, and I/O, enabling data exchange between them.
Name the three types of lines in a System Bus.
- Data lines (Data Bus): Transfers data
- Address lines (Address Bus): Specifies data locations
- Control lines: Coordinates operations and timing
Function of Data Lines in a bus.
They provide a pathway for data transfer between components. The width (number of lines) impacts data transfer capacity.
Purpose of Address Lines in a bus.
Address lines specify data sources or destinations. The width of the address bus limits the system’s maximum memory capacity.
Role of Control Lines in a bus.
Control lines manage data and address line usage, sending commands (like read/write) and timing information for operations.
What is Bus Arbitration, and why is it important?
Bus arbitration ensures only one device at a time uses the bus, preventing conflicts. It’s managed using master-slave control.
Types of Bus Arbitration Methods.
- Centralized: A single controller manages access
- Decentralized: Each device contains logic to control bus access
Difference between Synchronous and Asynchronous Bus Timing.
- Synchronous: Events occur on clock cycles, creating predictable timing.
- Asynchronous: Timing depends on previous events, allowing flexibility for varying device speeds.
What are Multiple Interrupts, and how are they handled?
Multiple interrupts can occur at once. They are managed by either disabling further interrupts temporarily or assigning priorities.
Describe Nested Interrupt Processing.
In nested processing, higher-priority interrupts can interrupt lower-priority handlers, allowing critical tasks to be addressed first.
Define Direct Memory Access (DMA) Transfers.
DMA enables data transfer directly between I/O and memory without CPU, increasing efficiency, especially for large transfers.
Key components connected by an Interconnection Structure.
Memory, processor, and I/O modules, each having specific roles in data storage, processing, and input/output.
Explain the concept of a Multiplexed Bus.
A multiplexed bus shares lines between address and data signals, reducing the number of lines but adding control complexity.
Advantages of a Dedicated Bus over a Multiplexed Bus.
A dedicated bus has separate address and data lines, simplifying control but requiring more lines.
Describe Master-Slave Mechanism in buses.
In this mechanism, the master device controls bus access, while the slave device receives data from the master.
Examples of data transfers in a computer system.
- Memory to Processor: Reads data
- Processor to Memory: Writes data
- I/O to Processor: Reads device data
- Processor to I/O: Sends data to a device
- I/O to/from Memory (DMA): Direct device-to-memory transfer
