Chapter 3 Flashcards

1
Q

a complex sequential circuit whose primary function is to execute programs that are stored within its Flash EEPROM (Electrically Erasable Programmable Read Only
Memory).

A

CPU w/in a microcontroller

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2
Q
  • a series of instructions to perform a specific task w/c are developed by microcontroller system designer using program
    development tools.
A

Program

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3
Q

main control center for the entire microcontroller. While responding to different program instructions, the CPU will call upon its resident subsystems to perform their tasks.

A

Central Processing Unit (CPU)

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4
Q

tends to run slower than the other two configurations
since operands must be continually fetched from memory
- has the ability to execute fairly complicated instructions
- may also be modified such that one operand is located in
a register and the other is found in memory.

A

Accumulator-based architecture

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5
Q
  • both operands are stored in registers that are
    typically collocated with the central processing unit
  • the processor does not have to slow down to read or write operands
  • contents are read from and written to memory using a background operation.
A

Register-based architecture

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6
Q
  • both operands and the operation to be performed are
    stored on the stack.
  • may be based in dedicated registers or may be a
    special portion of random access memory.
A

Stack-based architecture

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7
Q
  • architecture consists of separate hardware subsystems called stages to fetch an instruction from memory, decode the instruction, fetch instruction operands from
    memory or registers, execute the instruction, and then write the results back to memory.
  • the overall result is that an instruction completes execution on every clock cycle.
A

. Pipeline architecture

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8
Q

Two basic types of instruction set architectures:

A

Reduced Instruction Set Computer (RISC)
Complex Instruction Set Computer (CISC)

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9
Q
  • has a complement of simple building block
    instructions.
  • lend themselves to systems with less complex CPU
    architectures.
A

. Reduced Instruction Set Computer (RISC)

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10
Q
  • has a complement of fuller feature, more complex
    instructions than the RISC-based architecture
A

Complex Instruction Set Computer (CISC)

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11
Q
  • collection of parallel conductors that have a similar function.
A

Bus

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12
Q
  • provides a connection between the central processing unit and the memory subsystem aboard the microcontroller.
  • the number of uniquely addressable memory locations in a microcontroller is determined by the width of the address bus. - first address in the memory subsystem will be all zeroes while the final address will be all logic ones.
A

. Address Bus

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13
Q
  • used to route parallel data about different subsystems within the microcontroller. - Microcontrollers are commonly available with data bus widths of 4, 8, 16, or 32 bit w/c determines the size of a data argument that the microcontroller can process.
A

. Data Bus

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14
Q
  • Microcontrollers are equipped with paths to send and receive a collection of control signals designated as control
    bus
    signal lines carry control signals (issued by the CPU in response to program instructions to insure the instruction is properly executed) to different subsystems through out the microcontroller.
A

Control Bus

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15
Q

addressable memory usually contains several different types of memory

A

MEMORY:

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16
Q

provides the size in bytes of each memory component and its start and stop address within the memory system.

A

Memory map

17
Q

volatile (if the microcontroller loses power, the contents of RAM memory are lost.)
- can be written to and read from during program execution
- used during system development to store a program

A

RAM

18
Q
  • used to permanently store and recall variables during program execution
  • useful for logging system malfunctions and fault data during program execution
  • useful for storing data that must be retained during
    a power failure but might need to be changed periodically
A

. Byte-addressable EEPROM

19
Q
  • used to store programs.
  • can be erased and programmed as a whole.
  • developed in RAM and then transferred to Flash EEPROM when complete
A

Flash EEPROM

20
Q

control the speed at which a microcontroller sequences through its actions

A

TIME BASE

21
Q

the number of cycles per second completed by a repetitive signal.

A

Frequency

22
Q

time increment in seconds required for a repetitive signal to complete a single cycle. The period is the reciprocal of the frequency (T = 1/ f ).

A

Period -

23
Q

indicates the percentage of time for which the signal
is active in a single period.

A

Duty cycle

24
Q

frequently used to control motor speed.

A

Pulse width modulation (PWM)