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Computer Science A Level > CAP 1 > Flashcards

CAP 1 Flashcards

1
Q

3BM: What are the three boxes in the THREE BOX MODEL?

A

Processor
Main Memory
I/O

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2
Q

What is main memory?

A

Memory that is directly addressable by the processor.

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3
Q

What does volatile mean?

A

When power is lost, it loses its contents.

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4
Q

What does ‘random’ mean in terms of RAM?

A

Locations can be accessed directly in any order.

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5
Q

3BM: How does the processor communicate with I/O devices

A

The processor communicates through I/O controllers.

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6
Q

3BM: What is an I/O controller?

A

I/O controllers are circuits that connect to a bus and an I/O device.

Eg it provides the current voltages and currents required by the bus and I/O device

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7
Q

3BM: What is the system bus?

A

The system bus is a set of PARALLEL wires connecting independent components of a computer system

It is used to PASS SIGNALS between components.

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8
Q

What is the data bus?

A

The data bus is bidirectional and is used to transfer data between components.

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9
Q

What is the address bus?

A

The address bus is unidirectional and is used to address memory and I/O locations

(from the processor to other devices)

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10
Q

What is the control bus?

A

The control bus is bidirectional and is used to send control signals between components.

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11
Q

What are the two conditions of the stored program concept?

A
  1. A program must be resident in main memory to be executed
  2. Machine instruction code are fetched SEQUENTIALLY and executed one at a time in the processor.
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12
Q

Give three examples of the control signals that could be sent along the data bus.

A

Clock signals
Memory read
Memory write

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13
Q

What is a peripheral?

A

Connected to the computer but not a part of its core architecture.

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14
Q

What are the differences between Von Neumann and Harvard architecture?

A
  1. Von Neumann has one memory unit for both instructions and data WHEREAS Harvard has separate memory units for instructions and data
  2. Von Neumann has one set of buses for both instructions and data WHEREAS Harvard has separate buses for instructions and data
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15
Q

How can Harvard architecture be more secure when building embedded systems?

A

For systems with a predetermined use, instruction memory can be implemented as ROM which protects the programs from hacking.

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16
Q

What does the ALU do?

A

Performs calculations such as add, or and shift operations and logic operations.

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17
Q

What does the clock do?

A

The clock creates a continuous sequence of clock pulses to synchronise the operations of the processor components.

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18
Q

What does the control unit do?

A

The control unit coordinates activities in the CPU, memory and peripherals.

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19
Q

What are registers?

A

Registers are locations of computer memory within the processor that provide extremely fast access to small amounts of data.

Registers are used for temporary storage of binary values.

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20
Q

What are general purpose registers used for?

A

General purpose registers are used for keeping the results of the intermediate calculations that are produced as part of a larger computation.

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21
Q

What is the status register used for?

A

The status register is used to store information about the result of the last instruction.

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22
Q

What two things must happen before a program’s instructions are ready to be executed?

A
  1. They have to be translated into machine code
  2. The program instructions have been loaded into main memory.
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23
Q

Describe the fetch stage.

A
  1. Contents of the PC is copied into the MAR
  2. The address bus is used to transfer this address to main memory

3.1 The instruction held at that address is transferred via the data bus into the MBR
(simultaneously)
3.2 The PC is incremented to hold the address of the next instruction to be executed (not always +1 e.g. if word length is two bytes)

4 The contents of the MBR are copied into the CIR

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24
Q

Describe the decode stage.

A

The instruction held in the CIR is decoded by the control unit based on the processor’s instruction set

The instruction is split into its opcode and operand

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25
Q

Describe the execute stage.

A

The relevant part of the CPU executes the instruction held in the CIR.

Further memory fetches are carried out if necessary.

The general purpose registers and SR are updated.

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26
Q

What is meant by throughput?

A

The number of instructions carried out per second.

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27
Q

What is the instruction set?

A

The instruction set is the set of binary codes for the machine operations that a processor has been designed to perform.

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28
Q

What is meant by clock speed?

A

The frequency at which the system clock ticks

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29
Q

What does 3.6GHz clock speed mean?

A

The processor is capable of processing 3.6 billion ‘state changes’ a second.

not necessarily 3.6 billion instructions

30
Q

How does clock speed affect performance?

A

Higher clock speed means more instructions can be executed per unit time.

31
Q

What are two drawbacks of increasing clock speed?

A
  1. All machine code instructions take a certain amount of time to execute
  2. Heat dissipation issues increase as clock speed increases.
32
Q

What is meant by word?

What is meant by word length?

A

The word if the fixed size unit of data used across the computer.

The word length is the number of bits in a word

33
Q

How does word length affect performance?

A

Longer word length means registers can store more bits, so the processor can process more bits in one go.

Increasing the word length means data can be fetched in fewer passes, so the processor can process data and instructions quicker.

34
Q

What is a drawback of increasing the width of the address bus?

A

Won’t improve performance if all instructions and data already fit into RAM.

35
Q

What is meant by bus width?

A

The bus width is the number of parallel signal lines allocated to a bus

36
Q

What is the effect of increasing the address bus’ width?

A

The processor can access a larger number of memory locations

so doesn’t have to access secondary storage as often

which reduces reliance on virtual memory

37
Q

What does the width of the address bus determine?

A

The width of the address bus determines the number of bits that can be used to form an address.

38
Q

What does the width of the data bus determine?

A

The width of the data bus determines the number of bits that can be transferred to or from memory in one operation.

39
Q

What is the effect of increasing the data bus’ width?

A

More bits can be transferred between main memory and the processor, so fewer read/write operations are needed

So there are fewer delays when retrieving data.

40
Q

What is meant by cache memory?

A

Cache memory is a small capacity of very fast memory that sits close to the processor. It stores instructions and data most frequently used.

41
Q

What is the smallest and fastest type of cache?

A

Level 1 cache.

42
Q

What is the effect of increasing the size of cache?

A
  1. Increasing cache size means more data can be stored in cache.

2.Cache is faster to access than main memory.

  1. Which means main memory needs to be accessed less frequently.
  2. So speed and response time increases.
43
Q

What is a core?

A

A core is a complete processing unit within the CPU

44
Q

What is the effect of increasing the number of cores?

A
  1. Multiple tasks can be run at the same time
  2. A single task can be split over multiple processors
    –> many programs are now written to optimise the use of parallel processing
  3. The number of instructions that can be executed per second increases.
45
Q

What is the drawback of increasing the number of cores?

A

Increasing the number of cores greatly increases the cost and complexity of the system.

46
Q

What is a processor interrupt?

A

A processor interrupt is a signal that is sent to the processor to request immediate attention.

47
Q

What does the processor do when is receives an interrupt?

A

It suspends what it is doing and runs the program associated with the interrupt.

48
Q

List 4 possible reasons for an interrupt to occur.

A

1.A hardware device that has data ready to process

  1. A hardware device has completed a task it was asked to do
  2. A pre-set timer has expired
  3. A hardware failure has occurred and needs to be addressed
49
Q

What is an ISR?

A

Interrupt Service Routines are small programs designed to process each interrupt.

50
Q

Where can ISRs come from?

A

ISRs can be provided by the operating system or I/O device drivers.

51
Q

What is affected when an ISR is serviced?

A

The normal FDE cycle is affected.

52
Q

In 3 short points, what happens when an ISR is serviced?

A
  1. The program is paused
  2. The ISR is run
  3. The program is resumed
53
Q

What needs to happen to ensure the ISR can be run safely?

A

The processor’s volatile environment needs to be saved while the ISR is running.

54
Q

What is the volatile environment of a processor?

A

The processor’s volatile environment is a snapshot of the information needed to execute a process from its current instruction (eg registers like the PC)

55
Q

What happens in the FIRST 5 stages of a processor interrupt.

A
  1. The processor receives the interrupt
  2. The processor completes the FDE cycle of the instruction that it was running when it received the interrupt
  3. Current contents of the processor registers are saved to memory
  4. Appropriate ISR is called by identifying the origin of the interrupt
  5. All other lower-priority interrupts are put on hold to allow the ISR to finish running
56
Q

What happens in the LAST 5 stages of a processor interrupt.

A
  1. All other lower-priority interrupts are put on hold to allow the ISR to finish running
  2. The PC is updated with the address of the first instruction of the ISR
  3. The ISR completes its execution
  4. The processor registers are reloaded with the values that were saved to memory
  5. The lower-priority interrupts that were put on hold are re-established
  6. PC is updated with the next instruction of the program that was initially running when the processor received the interrupt
57
Q

What is another name for postfix?

A

Reverse Polish Notation

58
Q

What are 3 advantages of postfix over infix?

A

Each expression in postfix is unambiguous.

Postfix is evaluated from left to right so is fast for computers to calculate

Brackets aren’t needed

59
Q

How do you convert from postfix to infix?

A
  1. Covert num,num,op triplets one at a time, adding brackets at each step
  2. Remove the unnecessary brackets.
60
Q

How do you covert from infix to postfix?

A
  1. Add brackets around every operation
  2. Draw arrow from operator to end of bracket
  3. Write expression keeping numbers in the same order
61
Q

Why are hexadecimal numbers preferred over binary numbers in certain contexts?

A

They are easier for humans to work with than long binary numbers.

They take up less space than long binary numbers

62
Q

What sort of binary numbers does two’s complement use?

A

Two’s complement uses fixed width binary numbers.

63
Q

What does all 1s represent it two’s complement form?

A

-1

64
Q

How do you turn a positive number into a negative number in two’s complement form?

A

Flip the bits to the left of the least significant 1

65
Q

For what range of values will binary addition of numbers in 8 bits two’s complement form work?

A

-128 to 127

66
Q

Why are for loops known as fixed (definite) loops?

A

Th number of iterations is determined before the loop is started.

67
Q

What is the definition of an algorithm?

A

An algorithm is a sequence of steps that solve a problem, which can be completed in finite time.

68
Q

What is another part other than the IO port that is part of the IO controller?

A

Electronics appropriate for sending signals to the peripheral

69
Q

What is the role of the IO port

A

To provide a connection between the processor and the peripheral to allow the exchange of data

70
Q

What are two reasons IO controllers are needed?

A

Peripherals usually operate at a slower speed than the processor so the IO is needed to act as a buffer

The processor and peripheral may use different voltages/currents

Computer Science A Level (5 decks)

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