Architecture of the CPU

Question 1

What occurs at fetch?​

Answer 1

Address of next instruction processed copied from PC to MAR, PC is increased to point in next instruction, stored at MAR copied to MDR.​

Question 2

What occurs at execute?​

Answer 2

Operation performed, ALU performs operation by CU, value or PC or MAR may be changed.​

Question 3

What occurs at decode?​

Answer 3

CU decodes instruction, send control signals.​

Question 4

What happens at fetch execute cycle?​

Answer 4

Instruction from RAM at PC, value is increased, so next instruction, is decoded by CU in CPU, which executes instruction.​

Question 5

What is ALU?​

Answer 5

Performs all of arithmetic and logical of CPU, Boolean logic operations, addition. Results are stored in accumulator register.​

Question 6

What is CU?​

Answer 6

Execute instructions, send control signals to other places in CPU, has decoder, decodes instructions that are retrieved from memory, and clock, sends an electrical pulse to let 2 things happen at once.​

Question 7

What is cache?​

Answer 7

Small amount of memory part of CPU, hold instructions and data that CPU likely to reuse.​

Question 8

What are registers?​

Answer 8

Small area of memory within CPU.​

Question 9

MAR

Answer 9

Memory Address Register, holding address of location in memory where data or instruction to be stored.​

Question 10

MDR

Answer 10

Memory Data Register, holding data that has been retrieved from memory.​

Question 11

ACC

Answer 11

Accumalator, holding result of caluclations, and operations.​

Question 12

PC

Answer 12

Program Counter, holding memory location address of next instruction so performed at CPU, increased at FCE.​