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Computer Science BSc - Year 1 > Architecture II > Flashcards

Architecture II Flashcards

1
Q

What are the 4 systems of memory?

A
  • Primary (system) = registers, cache, main memory, virtual; directly accessible by CPU
  • secondary (online) = spinning hard-drives; data must be transferred to main memory when needed
  • Tertiary (near-line) = tape libraries, optical jukebox; can be bought online quickly
  • offline = optical disk, flash drive, external HDD; disconnected and used for backup purposes or transportation
  • as you go down the levels the cost and speed decreases but size increases
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2
Q

What is computer memory?

A
  • temporary storage area that holds data and program instructions that CPU needs
  • consists of many storage cells, each of which can store 1 bit
  • each storage location holds one word (8-bit computers hold 8 bits in location, 16 bit ones store 16 bits)
  • impractical to assign distinct addresses to individual bit locations therefore addresses refer to byte location
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3
Q

What is RAM?

A
  • Primary memory
  • set of memory chips made of millions of transistors and capacitors
  • directly accessed by CPU
  • read/write
  • volatile
  • holds data/application programs from input devices or storages
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4
Q

Difference between SRAM and DRAM

A 
SRAM;
-bits stored in transistors
-fast, retains state 
-complex construction, expensive 
-used for registers, cache, buffers in I/O devices, RAM in embedded systems
DRAM
-bits stored as charge
-slower, discharges after sometime
-structural simplicity, cheaper
-used for bulk of PC main memory, large memory units
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5
Q

SRAM and DRAM implementation

A
  • SRAM = 3 bit words, 2 bit addresses, combines; decoder, registers and clock switch
  • DRAM = uses capacitors, new electronic component, store charge, same addressing as other RAMS
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6
Q

Difference between SIMM and DIMM

A 
SIMM
-Single in line memory module
-32 bit bus width
DIMM
-Dual in line memory module
-64-bit bus width
-predominant type of memory module in 2018
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7
Q

What is DDR?

A
  • Type of DRAM
  • transfers data on both rising and falling edges of clock signal
  • various versions with each becoming faster, more efficient, increasing in capacity and lowering in power consumption
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8
Q

What is ECC RAM?

A
  • error correcting ram
  • used in applications where high confidence needed (in-memory databases, popular servers, government, financial etc)
  • has extra chip on the DIMM which store extra copies or checksums of the data
  • not commonly used as regular DRAM is good
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9
Q

What is Virtual memory

A

You know

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10
Q

What is ROM?

A
  • persistent state (non-volatile)
  • used to store firmware and BIOS
  • can be written to (Morden ones)
  • limited number of write/erase cycles
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11
Q

Types of ROM

A
  • Mask ROM = contents programmed using photolithography by manufacturer
  • Programmable ROM = empty of data when the chip is manufactured; programmed by user. Cannot be erased when programmed
  • erasable ROM = like PROM but the chip can be removed from computer and program erased
  • Electrically EPROM = like EPROM but electricity is used to erase and reprogram selected contents
  • flash memory
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12
Q

What is the principle of locality?

A
  • temporal locality = values tend to be accessed repeatedly at nearby times
  • sequential locality = same sequences tend to be re-accessed in same orders
  • spatial locality = values nearby in memory tend to be accessed together
  • applies to both instructions and data
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13
Q

What are the levels of cache memory?

A
  • L1 includes three different sections; instruction (Harvard) cache, data cache, translation lookaside buffer cache virtual memory page tables
  • L2 is shared, also L3 is a thing
  • cache nowadays is located on CPU
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14
Q

What is a cache line

A
  • cache memory is made of cache lines
  • block = copies of several contiguous words from memory
  • tag = address or other ID describing which memory is copied in the block
  • dirty bit = logging whether the block data is modified
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15
Q

What is hit/miss?

What is the victim?

A
  • requested data is found/not found
  • hit/miss rate = factor of time data is found/not found (max 1)
  • hit time = time required to access requested data
  • miss penalty = time required to process a miss
  • cached data to be thrown out to make room for new data
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16
Q

What is hashing?

A
  • hash function maps a big datum to a smaller one

- not usually possible to recover original from the hash data

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17
Q

3 types of hashing algorithms?

A 
Direct = always read and or store address and block in the same place; easy fast and cheap, different values produce same hash
Associative = store tag at any available line; can cache all the best addresses at once, cost/complexity of digital logic is high
Hybrid = hash address to subset of lines in cache memory then use associative rules inside these subset
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18
Q

What is special about cache write?

A
  • similar to reading from cache but victim cant just be thrown away, needs to be written to memory
  • write through = copy to RAM and unset diary bit shortly after cache write (uses lots of bus bandwidth)
  • write back = write the RAM only when victimised (slower at the time)
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19
Q

What is the layout of a disk drive?

A
  • each surface is divided into a number of concentric tracks
  • track has same width as head and a number of sectors
  • adjacent sectors and tracks are separated by gaps
  • data transferred to and from disk in sectors
  • each sector has a unique address
  • data is accessed in a random-access manner
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20
Q

What affects a disk drives performance?

A
  • access time spit into; seek time (time it takes for arm to position over desired track) and rotational delay (time it takes for desired sector to position itself under head)
  • transfer time = time it takes to read/write data
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21
Q

What is RAID

A
  • redundant array of independent discs
  • method to make hard discs more resilient to failure
  • use multiple discs as redundant backup and or speed up
  • various architectures including; RAID1 (simple backup of complete disc), RAID5 (file striping, allows access to many parts of files at the same time
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22
Q

What is I/O?

A
  • any transfer of data to or from the CPU/memory combo is considered I/O
  • if CPU is brain then I/O is nervous system
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23
Q

How do we ensure a node can send a message to another node

A

The node must

  • announce who its for
  • announce the type of message
  • announce the data
  • ensure the above signals don’t collide with signals being sent by other nodes
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24
Q

Advantages and disadvantages of the bus

A
  • easy to add new devices
  • low cost due to shared wires
  • bottleneck; performance of the system limited by the bus
  • performance limited by physical factors (wire length, number of connections)
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25
Q

Non-bus networks?

What is bandwidth?

A
  • point to point
  • mesh networks
  • bandwidth = lane speed * number of lanes
  • how much data can be transferred in a time
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26
Q

What determines the size of memory?

A
  • size of addressable locations
  • width of address bus
  • 32 bit systems have 2^32 amount of memory or 4GB
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27
Q

What is MAR and MBR?

A
  • MAR hols address of read/write to go on address line
  • MBR holds data to go on/retrieved from data line
  • control uni connects them temporarily to the bus and adds the control one signal
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28
Q

What is the system bus and the expansion bus?

A
  • system bus connects the CPU to main memory on the system board
  • expansion bus allows the CPU o communicate with peripheral devices
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29
Q

What is an I/O module?

A
  • any external device attaches to a computer by a link to an I/O module
  • appears to the CPU and assembly programmer as an area of read/writable memory just like main RAM
  • functions include; device communication, control and timing, data buffering and error detection
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30
Q

What might writing to I/O module addresses involve?

A
  • transmit commands to the module/device

- send data to the module/device

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31
Q

What might reading from I/O module address involve?

A
  • read data from the module/device

- read status information from the module/device

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32
Q

How do I/O modules handle control and timing?

A
  • must be able to co-ordinate the flow of data between the internal resources and external devices
  • devices may be slow so module manages them independent of the CPU
  • this allows the CPU to go and do other things at the same time
  • another form of parallelism
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33
Q

How is data sent to IO module?

A
  • data coming from main memory is sent to a module in a rapid burst
  • data is then buffered in the module and sent to peripheral device at its data rate due to the transfer rate of external devices being much sower than internal
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34
Q

How do IO modules detect errors?

A
  • report errors to the cpu
  • mechanical or electrical malfunctions reported by device
  • unintentional changes to bit pattern as it is transmitted from devices to IO module
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35
Q

Difference between IO modules vs device drivers?

A
  • IO modules are hardware connected to the bus
  • device driver is a piece of software which takes sole responsibility for all communications with the IO modules or with one, or many, devices connected to it
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36
Q

What are the steps involved in transferring data from an external device to a cpu

A

1) CPU asks IO module to check status of device
2) IO module returns device status
3) if ready, CPU requests transfer of data
4) IO module obtains a unit of data from the device
5) Data transferred from IO module to cpu

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37
Q

What is polling?

A
  • cpu is executing a program and encounters an instruction relating to IO operation
  • cpu executes that instruction by issuing a command to appropriate IO module
  • IO module performs requested action based on IO command
  • IO module sets appropriate bits in IO status register
  • CPU periodically checks status of IO module until it finds that operation is complete
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38
Q

Pros and cons of polling

A
  • simple
  • cpu has direct control
  • very little hardware support
  • cpu must periodically poll the module to check status
  • ties up cpu for long period with no useful work
  • cpu slowed to the speed of the peripheral
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39
Q

What is an interrupt?

A
  • cpu issues read command
  • IO module gets data from peripheral whilst CPU does other work
  • IO module interrupts the CPU
  • CPU requests data
  • IO module transfers the data
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40
Q

Pros and cons of interrrupt?

A
  • fast
  • efficient
  • tricky to write
  • Done by hardware manufacturer
  • still requires active interaction of cpu for data transfer between memory and IO module
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41
Q

What is DMA

A
  • requires DMA controller on system bus
  • takes IO communication over from cpu
  • cpu grants authority to read from or write to memory
  • relieves cpu to do other things
  • DMA sends interrupt when task is complete
  • cpu is only involved at beginning and end of transfer
  • used for large data movement
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42
Q

What is the high performance architecture

A
  • if many devices are connected to the bus
  • data transfer demand approaches capacity of bus
  • bus becomes bottleneck
  • the solution is to use multiple buses laid out in a hierarchy
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43
Q

How do modern PC’S connect buses

A
  • Northbridge = fast, connects direct to CPU, RAM, PCIe, GPU
  • Southbridge = slower, all other IO modules, migrated onto single chip
  • both are speed bottlenecks
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44
Q

How has IO changed over the years?

A
  • used to be that each device needed own module, which required its own IRQ line, which required it own IO level driver
  • painful to set up
  • today standard lower level bus has a single IO module (USB etc), which has single IRQ and single IO level driver
  • high speed level drivers then talk to devices directly over this
  • eg; USB sound card has no direct line to CPU
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45
Q

What is PCIe bus

A
  • peripheral component interconnect express
  • general purpose for internal peripheral devices (graphics, networking, sound, video capture
  • replacing old versions
  • 1 to 32 lane versions
  • speed versions (2GB-16GBs per lane)
  • not a bus, actually a mesh network
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46
Q

What is a serial port

A
  • ancient/classic point-point comes between 2 devices
  • not a bus
  • speed = 75-115200b/s, often 9600b/s
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47
Q

What’s USB

A
  • standard for connecting peripheral devices
  • not a bus
  • replaced a variety of of earlier interfaces
  • different versions and speeds; USB1: 12 Mpbs - USB3 5Gbps
  • USB hubs, master and slave layout
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48
Q

What are differential signals

A
  • USB has 4 physical wires, 5v
  • bits represented by differential voltage between 2 wires
  • these wired contain same information mirrored high-low
  • this makes wires immune to external electrical fields
  • especially when they are twisted together
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49
Q

What is IEEE1394

A
  • FireWire
  • competitor to USB
  • unlike USB is an actual bus
  • single channel shared by all devices, messages ID by device addresses and controlled for collisions
  • can daisy chain where as USB cannot
  • no fixed master, any device can take master role
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50
Q

What is SCSI

A
  • old, 1980’s
  • bus for mass storage devices (hard discs)
  • pioneered moving logic and work from cpu into IO module
  • reliable but expensive (used today in servers)
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51
Q

What is SATA

A
  • competitor to SCSI
  • serial ATA
  • cheaper and simpler
  • used in computer systems
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52
Q

What is I^2C bus

A
  • user integrated circuit bus for connecting chips together
  • common in robotics
  • two wires (data and clock)
  • Multi-master, multi-slave
  • master:generates clock, initiates comes
  • slave: replies to maser
  • basic message collision avoidance: only talk if the bus is free
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53
Q

What is practical I^2C

A

FTDI chip

  • standard way to access I2C from user code (for robotics)
  • run serial port over USB in FTDI, convert to I2C
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54
Q

What is Controller Area network bus

A
  • a vehicle bus is a specialised internal communications network that interconnects components inside a vehicle (train, ship, car etc)
  • CAN is a true serial bus
55
Q

What is Ethernet?

A
  • a true bus
  • multiple PC’s in local area all writing and reading one bus
  • each message is a frame (contains MAC address)
  • must avoid collisions
  • bus is public so everyone can see information on it
  • modern networks build non-bus features on top of basic bus (mesh and star topologies)
56
Q

What is infiniband

A
  • extremely fast data connection for super computers
  • connect both within and between computers
  • connect via Northbridge and PCIe
  • wire can go out of the box, like ethernet
  • blurs line between bus and network
  • violates most of networking theory for speed
  • not real a bus (mesh network)
57
Q

What is gigabit ethernet?

A
  • same as ethernet but faster
  • challenging infiniband for high performance computing
  • connected via PCIe/Northbridge as opposed to classic ethernet connecting via southbridge
  • 10GBs ethernet in development
58
Q

How is bus design transforming in 2018?

A
  • replacement of parallel with fast, simple serial buses
  • replacement of buses with mesh network to reduce congestion bottleneck
  • everything racing to move up from southbridge>Northbridge>CPU silicon
59
Q

What is an embedded system?

A
  • an entire computer system built into a larger product or another device
  • work well with small amounts of ram and low processing power
  • user does not have to deal with complexity, they only deal with the interface
  • built for a specific task
  • very time critical (real time OS)
60
Q

What are some applications of embedded systems?

A
  • Automation
  • consumer electronics
  • medical electronics
  • telecom
  • remotes
  • military
  • cars
  • industrial controls
61
Q

How many embedded systems do we use?

A
  • average home has 40-50

- cars have over 60

62
Q

Some examples of embedded systems?

A
  • keyboards = convert matrix of on/off presses to ASCII-like serial code, then send via USB
  • optical mouse = optical flow implemented in digital electronics
63
Q

What is special about the design of an embedded system?

A
  • focused on one appliation, only the hardware we need for the app
  • efficiency is very important
  • need to be fast, reliable, low power and price and small in size
64
Q

Difference between general purpose embedded systems and application specific embedded systems?

A
  • GP = use hardware, OS and software developed by different companies (ubuntu)
  • AS = hardware and software are designed together and are matched
65
Q

What is ubiquitous computing?

A
  • Ubicomp developed by Marc Wiser, Xerox Parc in 1988
  • influential cultural movement which applies embedded systems to human interaction
  • natural interfaces, information visualisation, artistic, architectural and political interactions
66
Q

What is mindful computing?

A
  • 2010’s opposite of Ubicomp
  • people are freaked out by losing control
  • so present attention-focusing, tactile interfaces
  • if you turn on a light - be fully at one with it
67
Q

What components make up embedded systems?

A
  • sensors (input)
  • Actuators (output)
  • Signals
  • analogue/digital conversion and vise versa
68
Q

What are sensors in embedded systems?

A
  • capture physical/chemical analogue quantity and convert to analogue electrical quantity
  • pressure, force, heat, flow, chemical, sound, vibration, light etc
69
Q

What are actuators in embedded systems?

A
  • put things into action or motion

- radio signals, lights, buzzers, motors, speakers etc

70
Q

What is motor actuation?

A
  • a controller gives motor commands
  • driver is a power amplifier (takes low power commands from controller and converts them to high power currents)
  • motor converts electrical to mechanical power
  • encoder senses the motor state and feeds this back to controller
71
Q

What is a micro controller?

A
  • marketing term, just means any processor chip sold for embedded use
  • typically some system on the chip including; CPU, memory, analog/digital conversion and I/O devices
72
Q

Pros and cons of micro controllers

A
  • everything in one chip, small devices, can fit almost anywhere
  • lower performance than desktop
  • cheap
  • low power consumption meaning less heat and longer battery life
  • reliable
73
Q

What type of memory do micro-controllers have?

A
  • much smaller capacities than in PC’s
  • fast sRAM, volatile, used to store temp data
  • EEPROM, non-volatile
74
Q

What are micro-controllers timers/counters

A
  • timer = measures precisely time intervals or elapsed time, register incremented for every machine cycle
  • counter = counts number of times particular event, or process occurred with respect to a clock signal. Used to count events happening outside micro-controller
  • watchdog timer = auto reset of the MCU in case of failure
75
Q

What are common word lengths for analogue digital conversion?

A

-8 bit, 16 bit, 32 bit

76
Q

What are micro-controllers IO ports?

A
  • transfer data to/from pins of the micro-controller

- digital ports for reading/writing binary values (controlling lights or receiving input from switches)

77
Q

How do MCU’s communicate?

A
  • external devices (sensors, extra memory)
  • other systems (host pc)
  • serial communication
  • synchronous buses
  • radio frequency
78
Q

What is an ardunio?

A
  • open source hardware embedded system

- makes IO and AVR (type of MC) programming easy

79
Q

What is the ATmega328?

A
  • no external memory or bus, small program and memory all on chip
  • 32 reg
  • IO goes straight into chip
80
Q

What is PIC?

A
  • brand name of microchip technology corporation in the US
  • used in large series of microcontrollers of different powers, very popular with engineers
  • similar to Atmel AVR
81
Q

What are DPS’s?

A
  • digital signal processors
  • specialised architectures for handling real time signals
  • features include; fixed point arithmetic representations and Harvard arch
  • long pipelines for multiple ALU operations, little branching, branchless loops
82
Q

What is a signal?

A

-sequence of continuous valued data

83
Q

Difference between pi and pi2?

A
  • pi = single core ARM11, 32 bit RISC 1GHz, GPU 1/2Gb RAM, USB HDMI
  • pi2 = ARM cortex-A7 quad cores, 900Mhz, GPU 1GB DRAM, HDMI, Ethernet
84
Q

What are PLC’s?

A
  • programmable logic controllers
  • used in industry to control factories
  • must be indestructible, reliable and simple
85
Q

What are programmable logic arrays?

A
  • PLA’s
  • standardised, mass producible logic array
  • initially everything connected to everything else
  • customer blows fuses at selected points to produce the circuit they wants
  • fuses can only be blown once so not re-programmable
86
Q

What are field programmable gate arrays?

A
  • FPGA
  • evolution of PLA
  • simple repeated blocks containing a few gates each, standard compute components
  • potential to connect everything to everything else via interconnects
  • interconnect states as firmware - reprogrammable/reusable
  • used for embedded devices and prototyping chips
87
Q

What is the Turing machine?

A
  • theoretical model of computation, not actually implemented
  • proposed 100 years after analytical engine and does same thing
  • helped redefine real numbers in pure maths
  • mis-interpreted as a practical computer design, inflicted SERIAL thinking on us for most of the century
88
Q

What is the relationship between transistor count and clock speed?

A

-smaller transistor, shorter critical path, quicker charging/discharging capacitor and faster clock

89
Q

Power consumption formula?

A
  • P = C * V^2 * F

- power, capacitance, voltage, clock frequency

90
Q

What is the current transistor trend?

A
  • transistor count still rising but lock rate flattening sharply
  • if trend continued the way it was the power and heat outputted would eventually reach the level of the suns surface
91
Q

What is SIMD?

What is MIMD?

A
  • Single instruction multiple data
  • eg; add 1 to every member of an array
  • multiple instruction multiple data
  • eg; processors all doing different things at the same time
92
Q

What is a ripple carry adder?

What is a carry save adder?

A
  • ripple carry is like column addition with carry digit of sum being taken to next column
  • carry save would be like teams doing the same column addition
93
Q

What are instruction level parallelisms?

A
  • let user write a serial program then optimise at runtime in hardware, optimisations are very local in program space and time
  • can do multi stage pipeline, eager execution (execute both branches until one reaches a decision) or out of order execution
94
Q

How do SIMD architectures work?

A
  • use long instruction words (64 bit) to represent multiple data items at once (4 * 16bit numbers of 8*8 bit numbers)
  • operate on these arrays with single instructions
  • cray supercomputers 1960’s-70’s
95
Q

What are modern SIMD instructions

A
  • complex CISC SIMD and dedicated registers

- moved from supercomputers to consumer PC’s

96
Q

What is vector processing?

A
  • add specialised very long vector registers in CPU
  • load them up with data
  • special institutions and ALU hardware to run SIMD instructions on them all
  • different from SIMD instructions which pack the data into a single word
97
Q

Difference between CPU and GPU hardware?

A

CPU
-optimised for low-latency computations with large cache and control unit
-complex pipelines fewer ALU’s
GPU
-optimised for data-parallel and high throughput computations
-DMA transfer to main RAM
-smaller cache and pipelines but thousands of ALU’s

98
Q

What is GPU architecture?

A
  • one host pc
  • may have multiple compute devices (multiple cards), made of multiple compute units, containing multiple processing elements and maybe some shared registers and cache
99
Q

What is GPU software?

A
  • a work group is a group of PE’s within a CU all executing the same instruction, a work item is a processing element execution it on one datum
  • kernel is a program of SIMD instructions given to a work group
100
Q

What is VLIW?

A
  • Very Long Instructions Words
  • similar to vector arch, multiple instructions on multiple data all in a single word
  • eg; single assembly instruction may contain information for add an integer in reg A to reg B, store result in C, increment register G and bit-shift register H
101
Q

What are multi core CPU’s?

A
  • multiple cores on one chip
  • share same address space
  • some cache levels are shared, some are not, tricky to get cache writes right
102
Q

What is non uniform memory access?

A
  • NUMA arch are single address spaces shared by processors
  • access times differ according to processor and address
  • used in supercomputers
103
Q

What is the blue gene supercomputer?

What is piz daint supercomputer?

A

-classic supercomputer based on custom chips

  • 2018 3rd most powerful known computer
  • arch is quite boring data centre style, 5k standard Intel Xeons = 240k cores with Nvidia GPU cards
  • could mean an end of supercomputing as a specialist field
104
Q

What is MPI?

A
  • message passing interface
  • standard function library for processes to send and receive discrete messages to one another
  • without caring how they are transported (TCP/IP, shared memory…)
  • found in HCP (high performance computing)
105
Q

What is SPMD?

A
  • single program multiple data
  • hundreds of maintained, identical PC’s
  • no shared memory, little or no communication between nodes
  • connected by standard Ethernet, shared network discs
  • good for data science
106
Q

What is grid computing?

A
  • lots of identical managed racked PC’s

- similar to data centre

107
Q

What is cloud computing?

A
  • like grids but much weaker organisation
  • lots of consumer grade computer working together, not identical and may be unreliable and untrustworthy
  • no shared memory and little communication between nodes
  • connected via public internet
  • due to unreliability users must consider sending out multiple copies of jobs incase of computer failure
108
Q

What is map-reduce?

A
  • many cloud computing projects all evolved to use similar structures
  • split task into chunks (each running same code on different data)
  • map each chunk to a worker computer
  • workers send back results (smaller than data), reduce these results into a single result
  • software tools such as Hadoop aid in this
109
Q

-Hadoop vs HPC applications

A

HPC = simulating physical things in 2d or 3D structure space
-structure is replicated in the equations
-use MPI to pass messages around it
Hadoop = data science, zillions of similar data records, little or no interaction between them, map-reduce jobs divide the work between them

110
Q

Types of people who use HPC vs Hadoop?

A
  • HPC = experts and professionals with years of training, specialist expensive hardware locked in rooms
  • hadoop = hackers, cheap consumer hardware and map-reduce
111
Q

What is Spinnaker?

A
  • Spiking Neural Network Architecture
  • help simulate neutral network of brain
  • 1 million cores but slow unreliable messages between chips
112
Q

What is ROS

A
  • Robot operating system
  • message passing software framework
  • like MPI but higher level and therefore slower
  • nodes are arbitrary programs that can run on any computer
113
Q

What are engineering circuits?

A
  • engineers never got hung up on Turing machines and serial programs
  • instead they work with digital and circuits in which every object is alive
  • No CPU’s or instructions
114
Q

What is latency?

What is throughput?

A
  • latency = time to solution execution and response time

- throughput = tasks per unit of time bandwidth

115
Q

How does the CPU affect computer performance?

A
  • speeds throughput, number of registers
  • CPU time is the time CPU spends computing a program and does not include time spent waiting for IO
  • CPU time also means time spent executing lines of code
  • performance = 1/execution time
116
Q

3 Formula’s to compare two systems

A
  • execution time on system B/execution time on system A = n
  • One system will be n times faster than the other
  • can also do; performance of system A/performance on system B = n
  • To work out %; system A is x% faster than B, x = (n-1)*100
117
Q

How do we work out CPU time?

How can we improve performance of the cpu?

A
  • CPU time = (time/cycle)(cycles/instruction)(instructions/task)
  • increase clock rate or reduce number of cycles needed for a task
118
Q

How do we work out IPS?

A
  • Instructions per second = sockets(cores/socket)clock*(instructions/cycle)
  • used to measure non-numerical performance (database, servers, word processing etc)
119
Q

How do we work out FLOPS?

A
  • floating point operations per second
  • sockets(cores/socket)(cycles/second)*(FLOPS/cycle)
  • used to measure scientific numerical computing performance
120
Q

What are the two main server metrics

A
  • availability = (total elapsed time - sum of downtime)/total elapsed time
  • reliability = (total elapsed time - sum of downtime)/number of failures
121
Q

What is Amdahl’s law

A

-formula allows us to work out potential speedup of a program when using multiple processors rather than 1
S = 1/((1-f)+(f/k))
-fraction f is parallelizable
-(1-f) is serial
-k is the speed up in optimised part of the task
-s=overall speedup
-when f (parallel processes) is small the use of parallel processors has little effect

122
Q

What are benchmarks?

A
  • designed to mimic a particular type of workload on a component or system
  • compares difference between other systems or different hardwares
123
Q

Difference between synthetic and real world (application) benchmarks?

A
  • synthetic benchmarks are special test programs created to impose workload on component, useful for testing individual components
  • real world or application benchmarks are based on real world applications and give a much better measure of real world performance
124
Q

What are some important factors of benchmarking?

A
  • task type
  • load conditions = normal/peak loads, stress conditions
  • time = length of tests
  • stats
  • user = gamer, scientist, network admin etc
125
Q

Types of benchmarking for HPC

A
  • WHETSTONE = emphasises math/trig function speed
  • LINPACK = linear algebra package
  • DHRYSTONE = string and integer manipulations
126
Q

What is SPEC

A
  • System performance evaluation cooperative
  • companies that have agreed on a set of real test programs and data
  • supposed to represent typical application CPU use
  • valuable indicator of performance
127
Q

What is the fall of computer building

A
  • 1980’s comp builders ruled and pretty much everyone had same CPU’s
  • since 1990 CPU makers rule with OS defining the platform
128
Q

What are boot processes

A
  • power up = cpu hardwired to start with program counter
  • BIOS
  • Bootloader = first user facing program (eg; for OS menus)
129
Q

What is UEFI

A
  • uni-fined extended firmware interface
  • replaces BIOS conventions
  • secure boot, boot from larger hard discs (2TB +)
  • CPU independent
130
Q

What is the x86 arch?

A
  • most successful arch so far at 40 years old
  • family of CISC arch’s with 16, 32 and 64 bit versions
  • began in 1968 but first proper one in 1978
131
Q

What is a VDU?

A
  • visual display unit
  • memory mapped, write data direct to video RAM
  • IO module = VDU chip, reads video RAM, interprets data as current mode
  • device
132
Q

What is a modern graphics card?

A
  • PCIe bus connection to Northbridge
  • complex IO module
  • read and execute complex commands sent to its addresses
  • they are church complete computers themselves
133
Q

What is meltdown?

A
  • poses huge security threat to many manufacturers CPU’s
  • could allow user processes to access each other’s data (to steal passwords, emails or company data)
  • caused by complex unintended interaction between; VM , cache, CPU kernel mode switch, speculative execution, race condition and indirect addressing

Computer Science BSc - Year 1 (6 decks)

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