Address Translation Flashcards
What is the bit distribution in a 32-bit virtual address for a two-level page table with 1024 entries in the top-level and 512 entries in the second-level, given a 4KB page size?
Top-Level Index: 10 bits: log2(1024) = 10
Second-Level Index: 9 bits: log2(512) = 9
Page Offset: 12 bits: log2(4096) = 12
In a 32-bit virtual address space, how many bits are used for the page offset with a 4KB page size, and why?
12 bits are used for the page offset, as 4KB (4096 bytes) pages require 12 bits to address each byte within a page. log2(4096) = 12
What is the significance of the number of entries in the top-level and second-level page tables for address translation in a 32-bit virtual address space?
The number of entries in each level of the page table determines how many bits of the virtual address are used for indexing at that level.
This division of bits impacts how virtual addresses are mapped to physical addresses and the efficiency of memory utilization.
What is ‘paging’ in the context of virtual memory?
Paging is a memory management scheme that divides virtual and physical memory into blocks of equal size, called pages and frames, respectively.
It eliminates the need for contiguous allocation of physical memory, allowing more efficient and flexible use of memory resources.
How does a page table facilitate address translation in a virtual memory system?
A page table maps virtual pages to physical frames in memory.
Each entry in the page table corresponds to a virtual page and contains the frame number where that page is stored in physical memory.
The page table enables the operating system to translate virtual addresses to physical addresses by locating the corresponding physical frame for a given virtual page.
Describe the process of translating a virtual page number to a physical frame number in a paging system.
The virtual address generated by a program is divided into the Virtual Page Number (VPN) and the page offset.
The VPN is used to index into the page table to retrieve the Physical Frame Number (PFN).
The physical address is constructed by combining the PFN with the page offset. The offset is the same in both virtual and physical addresses due to the equal size of pages and frames.
What is a page fault in a virtual memory system, and how is it handled by the operating system?
Definition: A page fault occurs when a program tries to access a page that is not loaded into physical memory.
Handling Steps:
1. Detection: The hardware detects the missing page and triggers a page fault interrupt.
2. Interruption: The operating system interrupts the current program.
3. Cause Determination: The OS checks if the fault is valid (a legitimate memory reference) or invalid (a reference to non-existent memory).
4. Page Retrieval: For valid faults, the OS locates the page (either on disk or allocates a new one) and loads it into a free frame in physical memory.
5. Page Table Update: The OS updates the page table to reflect the new physical location of the loaded page.
6. Resuming Execution: The program is restarted at the point of interruption, now with the required page in memory.
Invalid Page Fault Handling: In case of an invalid fault (illegal memory access), the program is usually terminated or an error is signaled.
