8a Internal Hardware

Question 1

Explain the stored program concept

Answer 1

1. Instructions are stored in main memory
2. Instructions are fetched, decode and executed by the cpu
3. Programs can be moved in and out from main memory

Question 2

Describe the FDE cycle referencing registers and buses

Answer 2

1.The number stored in the PC goes to the MAR
2. The MAR requests the data from the RAM via the address bus. This data is sent via the data bus to the MBR.
3. At the same time the PC increments.
4. Data from the MBR is transferred to the CIR and decoded and executed.

Question 3

Which bus is monodirectional?

Answer 3

Address bus (because there are no addresses in the cpu so other computer components cannot request data from it’s addresses)

Question 4

Name 3 control lines

Answer 4

Memory write
Memory read
I/O write (outputs data on data bus to i/o port)

Question 5

What is the purpose of the control bus?

Answer 5

Used to specify what operation must be performed with data.

Question 6

What are all the buses together known as?

Answer 6

The system bus

Question 7

Why aren’t I/O controllers built into the cpu?

Answer 7

Inconvenient, would need a new CPU if a device requiring a new port was created

Question 8

What is the purpose of I/O controllers?

Answer 8

They act as a mediator between the CPU and peripherals, allowing data data transfer

Question 9

What is word size?

Answer 9

Word size refers to the fixed number of bits a processor can handle at once.

Question 10

Name 5 factors effecting processor performance

Answer 10

1. Clockspeed
2. Word size
3. Bus width
4. Number of cores
5. Size of cache

Question 11

What is the difference between von Neumann and Harvard architecture?

Answer 11

There is separate storage and buses for data and addresses in Harvard architecture.

Question 12

Explain the benefits of Harvard architecture

Answer 12

Addresses and data have their own buses, this means an instruction is executed once each clock cycle instead of once every two clock cycles, as the data address bottle neck is avoided. This means it is not only faster but the CPU can access instructions and write at the same time.

Question 13

Explain the advantages of Von Neumann architecture

Answer 13

It is cheaper in cost as less buses are required

Question 14

Explain how address bus width effects the processor

Answer 14

1. The address bus is made up of multiple wires, each wire represents one bit
2. The number of wires is known as address bus width
3. The more wires the more possible combination of memory locations that can be represented, meaning the RAM can be larger as more data can be stored.

Question 15

Explain how data bus width effects the processor

Answer 15

1. The data bus is made up of multiple wires, each wire represents one bit.
2. The bus width is determined by the number of wires.
3. A larger bus width allows for larger pieces of data to be transferred at anyone one time, making processing faster.

Question 16

Define an interrupt

Answer 16

When a process with higher priority arises less important tasks will be suspended until the higher priority task is complete.

Question 17

Why does multi-core processing not necessarily double the speed?

Answer 17

Cores need to communicate between each other which takes time. Moreover, only processes which do not require iteration can be carried out with multi core processing so not all programs benefit from it.

Question 18

What is the purpose of the status register?

Answer 18

Keeps track of functions of the computer such as if an overflow occurred or whether the last calculation was positive or negative.