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Electronics > 8085 INSTRUCTION SET > Flashcards

8085 INSTRUCTION SET Flashcards

Instructions

1
Q

ACI (ADD IMMEDIATE TO ACCUMULATOR WITH CARRY)

A 
OPERAND: 8-BIT DATA
BYTES: 2
M-CYCLES: 2
T-STATES: 7
DESCRIPTION: THE 8-BIT DATA(OPERAND) AND THE CARRY FLAG ARE ADDED TO THE CONTENTS OF THE ACCUMULATOR.

FLAGS: ALL FLAGS ARE MODIFIED TO REFLECT THE RESULT OF THE ADDITION

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2
Q

ADC ( ADD REGISTER TO ACCUMULATOR WITH CARRY)

A 
OPERAND: REG : 1, MEM: 1
BYTES: REG: 1, MEM: 1
M-CYCLES: REG: 1 , MEM: 2
T-STATES: REG: 4, MEM: 7
DESCRIPTION: THE CONTENTS OF THE OPERAND (REGISTER OR MEMORY) AND THE CARRY FLAG ARE ADDED TO THE CONTENTS OF THE ACCUMULATOR. THE CONTENTS OF THE OPERAND ARE NOT ALTERED; HOWEVER THE PREVIOUS CARRY FLAG IS RESET.

FLAGS: ALL FLAGS ARE MODIFIED TO REFLECT THE RESULT OF THE ADDITION

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3
Q

ADD ( ADD REGISTER TO ACCUMULATOR)

A 
OPERAND: REG: 1, MEM: 1
BYTES: REG: 1, MEM: 1
M-CYCLES: REG: 1 , MEM: 2
T-STATES: REG: 4 , MEM: 7
DESCRIPTION: THE CONTENTS OF THE OPERAND (REGISTER OR MEMORY) ARE ADDED TO THE CONTENTS OF THE ACCUMULATOR AND THE RESULT IS STORED IN THE ACCUMULATOR. IF THE OPERAND IS A MEMORY LOCATION , THAT IS INDICATED BY THE 16-BIT ADDRESS IN THE HL REGISTER.

FLAGS: ALL FLAGS ARE MODIFIED TO REFLECT THE RESULT OF THE ADDITION

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4
Q

ADI (ADD IMMEDIATE TO ACCUMULATOR)

A 
OPERAND: 8-BIT DATA
BYTES: 2
M-CYCLES: 2
T-STATES: 7
DESCRIPTION: THE 8-BIT DATA ARE ADDED TO THE CONTENTS OF THE ACCUMULATOR , AND THE RESULT IS PLACED IN THE ACCUMULATOR.

FLAGS: FLAGS: ALL FLAGS ARE MODIFIED TO REFLECT THE RESULT OF THE ADDITION

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5
Q

JMP: JUMP UNCONDITIONALLY

A 
OPERAND: 16-BIT 
BYTES: 3
M-CYCLES: 3
T-STATES: 10
DESCRIPTION: THE PROGRAM IS TRANSFERRED TO THE MEMORY LOCATION SPECIFIED BY THE 16-BIT ADDRESS. THIS IS A 3-BYTE INSTRUCTION; THE SECOND BYTE SPECIFIES THE LOWER ORDER BYTE AND THE THIRD BYTE SPECIFIES THE HIGH-ORDER BYTE.
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6
Q

JUMP CONDITIONALLY

A 
JC: JUMP ON CARRY 
FLAG STATUS: CY = 1
JNC: JUMP ON NO CARRY
FLAG STATUS: CY = 0
JZ: JUMP ON ZERO 
FLAG : Z = 1
JNZ: JUMP ON NO ZERO
FLAG: Z = 0
[IF THE CONDITION IS NOT TRUE] THEN,
*M-C: 2
*T-STATES: 7  
[IF THE  CONDITION IS TRUE]
*M-C: 3
*T-STATES: 10
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7
Q

LHLD : LOAD H AND L REGISTERS DIRECT

A 
OPERAND: 16-BIT ADDRESS
BYTES: 3
M-CYCLES: 5
T-STATES: 16
FLAGS: NO FLAGS ARE AFFECTED.

DESCRIPTION: THE INSTRUC. COPIES THE CONTENT OF THE MEMORY LOCATION POINTED OUT BY THE 16-BIT ADDRESS IN REGISTER L AND COPIES THE CONTENT OF THE CONTENT OF THE NEXT MEMORY LOCATION IN REGISTER H. THE CONTENTS OF SOURCE MEMORY LOCATION ARE NOT ALTERED.

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8
Q

LXI: LOAD REGISTER PAIR IMMEDIATE

A 
OPERAND: REG PAIR. 16 BIT ADDRESS DATA
BYTES: 3
M-CYCLES: 3
T-STATES: 10
FLAGS: NO FLAGS ARE AFFECTED.
DESCRIPTION: THE INSTRUCTION LOADS 16-BIT DATA IN THE REGISTER PAIR DESIGNATED IN THE OPERAND. THIS IS A 3-BYTE INSTRUCTION; THE SECOND BYTE SPECIFIES THE LOW-ORDER BYTE AND THE THIRD BYTE SPECIFIES THE HIGH-ORDER BYTE.
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9
Q

SHLD: STORE H AND L REGISTERS

A 
OPERAND: 16 BIT ADDRESS
BYTES: 3
M-CYCLES: 5
T-STATES: 16
FLAGS: NO FLAGS ARE AFFECTED.

DESCRIPTION: THE CONTENTS OF REGISTER L ARE STORED IN THE MEMORY LOCATION SPECIFIED BY THE 16-BIT ADDRESS IN THE OPERAND, AND THE CONTENTS OF THE H REGISTER ARE STORED IN THE NEXT MEMORY LOCATION BY INCREMENTING THE OPERAND.

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10
Q

RLC : ROTATE ACCUMULATOR LEFT

A

OPERAND: NONE
BYTES: 1
M-CYCLES: 1
T-STATES: 4
FLAGS: CY IS MODIFIED ACC TO THE BIT E7,S,Z,P,AC ARE NOT AFFECTED.
DESCRIPTION: EACH BINARY BIT OF THE ACCUMULATOR IS ROTATED LEFT BY ONE POSITION. BIT D7 IS PLACED IN THE POSITION OF D0 AS WELL AS IN THE CARRY FLAG.

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11
Q

RRC: ROTATE ACCUMULATOR RIGHT

A

OPERAND: NONE
BYTES: 1
M-CYCLES: 1
T-STATES: 4
FLAGS: CY IS MODIFIED ACCORDING TO THE BIT D0, S,Z, P,AC ARE NOT AFFECTED.
DESCRIPTION: EACH BINARY BIT OF THE ACCUMULATOR IS ROTATED RIGHT BY THE ONE POSITION. BIT D0 IS PLACED IN THE POSITION OF D7 AS WELL AS IN THE CARRY FLAG.

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12
Q

PUSH: PUSH REGISTER PAIR ONTO STACK

A 
OPERAND: REG PAIR
BYTES: 1
M-CYCLES: 3
T-STATES: 12
FLAGS: NO FLAGS ARE MODIFIED
DESCRIPTION: -
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13
Q

POP: POP OFF STACK TO REG PAIR

A 
OPERAND: REG PAIR 
BYTES: 1
M-CYCLES: 3
T-STATES: 10
FLAGS: NO FLAGS ARE MODIFIED
DESCRIPTION:
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14
Q

ORA: LOGICALLY OR WITH ACCUMULATOR

A 
OPERAND: REG: 1 , MEM: 1
BYTES: 1 , 1 
M-CYCLES: 1 , 2
T-STATES: 4 , 7
FLAGS: Z,S, P ARE MODIFIED TO REFLECT THE RESULTS OF THE OPERATION. AC AND CY ARE RESET. 
DESCRIPTION:
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15
Q

MOV: MOVE-COPY FROM SOURCE TO DESTINATION

A 
OPERAND: [RD, RS]/[M,RS]/[RD/M]
BYTES: 1  
M-CYCLES: 1 / 2
T-STATES:4 / 7 
FLAGS:NO FLAGS ARE AFFECTED
DESCRIPTION:
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16
Q

MVI: MOVE IMMEDIATE 8 BIT

A 
OPERAND: REG, DATA / MEM, DATA
BYTES: 2 / 2 
M-CYCLES: 2 / 3
T-STATES: 7 / 10
FLAGS: NOT AFFECTED
DESCRIPTION:
17
Q

LDA

A 
OPERAND: 16-BIT ADDRESS
BYTES: 3
M-CYCLES: 4 
T-STATES: 13
FLAGS: NOT AFFECTED
DESCRIPTION:
18
Q

INX : INCREMENT REGISTER PAIR BY 1

DCX : DECREMENT REGISTER PAIR BY 1

A 
OPERAND: REG PAIR
BYTES: 1 
M-CYCLES: 1
T-STATES: 6
FLAGS: NOT AFFECTED
DESCRIPTION:
19
Q

INR : INCREMENT CONTENTS OF REG/MEM BY 1

DCR: DECREMENT SOURCE BY 1

A

OPERAND: REG / MEM
BYTES: 1/1
M-CYCLES: 1 / 3
T-STATES: 4 / 10
FLAGS:S,Z,P,AC ARE MODIFIED. CY IS NOT MODIFIED.
DESCRIPTION: CONTENTS ARE INCREMENTED BY 1 AND THE RESULTS ARE STORED IN THE SAME PLACE. IF THE OPERAND IS A MEM LOCATION, IT IS SPECIFIED BY THE CONTENTS OF HL REG PAIR.

20
Q

DAD: ADD REGISTER PAIR TO H AND L REGISTERS

A

OPERAND: REG PAIR
BYTES: 1
M-CYCLES: 3
T-STATES:10
FLAGS: IF THE RESULT>16BITS , THE CY FLAG IS SET. NO OTHER FLAG ARE AFFECTED
DESCRIPTION: THE CONTENTS ARE NOT ALTERED.

21
Q

CMA: COMPLEMENT ACCUMULATOR

A 
OPERAND: NONE
BYTES: 1
M-CYCLES: 1
T-STATES: 4
FLAGS: NOT AFFECTED
DESCRIPTION:
22
Q

CMC: COMPLEMENT CARRY

A 
OPERAND: NONE
BYTES: 1
M-CYCLES: 1
T-STATES: 4
FLAGS: CARRY FLAG ONLY MODIFIED.
DESCRIPTION: COMPLEMENTED.
23
Q

CMP: COMPLEMENT WITH ACCUMULATOR

A

OPERAND: REG: 1 / MEM: 1
BYTES: 1 / 1
M-CYCLES: 1 / 2
T-STATES: 4 / 7
FLAGS: S, P , AC ARE ALSO MODIFIED IN ADDITION TO Z AND CY TO REFLECT RESULTS OF THE OPERATION.
DESCRIPTION:
IF (A)(REG/MEM): CARRY AND ZERO ARE RESET[0].

Electronics (1 decks)

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