7: Fundamentals of Computer Organisation & Architecture Flashcards
Basic Internal Components (4)
- Processor
- Main memory
- Input / output (I/O) controllers
- These components are connected by the system bus, which is made up of the address, data and control bus
Main memory (2, 1:2)
- Main memory is memory that can be accessed directly by the processor
- Each memory location has a physical address (which is used to locate and access its contents)
- There are two types of main memory:
– RAM is volatile working memory, which is used by the processor in the fetch-execute cycle and stores instructions and data currently in use
– ROM is non-volatile and stores information, which is used in the boot process of the computer system
Processor
The processor processes and completes tasks by executing program instructions
Bus
Connects components of a computer system by transferring data between them
Address Bus (4)
- The address bus is used to specify the address of a memory location to either read or write data there
- The address bus is unidirectional and there is a connection from the processor to main memory and I/O controllers across the address bus
- The width of the address bus refers to its number of parallel lines, which determines the number of bits that can be used to form an address
- Therefore, the width of the address bus determines the maximum memory capacity of a computer system
Data Bus (1:2, 3)
- The data bus is used to transfer data and instructions:
• Data is transferred to and from the processor, main memory and I/O controllers
• Instructions are carried from main memory into the processor - The data bus is bidirectional, allowing values to be written to or read from a memory location
- The width of the data bus refers to its number of parallel lines, which determines the number of bits that can be transferred in one operation
- Therefore, the data bus width determines the amount of data that can be fetched at once, which affects processor performance
Control Bus (2, 1:7)
- The control bus is used to send control signals which manage the operations that take place inside a computer system
- The control bus is bidirectional
- Examples of control signals:
• Memory read
• Memory write
• Bus request
• Bus grant
• Bus busy
• Interrupt request
• Clock signals
Memory Read
Places data from a specific memory location (whose address is on the address bus) onto the data bus
Memory Write
Stores the data from the data bus onto a specific memory location (whose address is on the address bus)
Bus Request
Signifies that a component needs to access a bus
Bus Grant
Informs a component that it can use the bus it requested access to
Bus Busy
Signifies that a bus is not available for use as it is being used by another component
Interrupt Request
Signifies that an error or exception has occurred that requires the processor’s attention
Clock Signals
Supplies the components with clock pulses generated by the system clock
I/O Controllers (1:2, 3)
- External (peripheral) devices are connected to the processor through I/O controllers. This means:
• Input data can be received from input devices
• Results of computation can be sent to output devices - I/O controllers provide a set of addressable registers that the processor can access to communicate with I/O devices
- A physical port on the controller provides a connection for the peripheral. The peripheral has a cable or connector to connect it to the port. The I/O controller facilitates the exchange of data between the processor and the peripheral. The controller translates the electrical signals into the correct form
- A device driver is needed for every peripheral. This is a piece of software that provides a software interface for the peripheral device, which enables the OS to access the functions of the hardware
Von-Neumann Architecture (4)
- The Von-Neumann architecture stores program instructions and data in main memory
- The same address and data buses are used to transfer instructions and data
- https://docs.google.com/presentation/d/1py7HJi8pHccmohEDrAKt8b95MUccaP7SkL4OhR6-mvw/edit#slide=id.g346a6d8c8c_0_44
- It is used in general purpose computer systems
Harvard Architecture (3)
- The Harvard architecture keeps instructions and data in separate memories
- The processor accesses these memories using separate data and address buses
- Embedded systems such as digital signal processing (DSP) systems use Harvard architecture processors
Concept of Addressable Memory
Each memory location has an address, with which its contents can be accessed
Stored Program Concept
Machine code instructions, stored in main memory, are fetched, decoded and executed serially by a processor. Programs can be moved in and out of main memory
Arithmetic Logic Unit
The ALU performs arithmetic calculations and comparisons and logical operations
Control Unit (4)
- It uses control signals to enable data to be read from and written to main memory
- It decodes every instruction that the processor will execute to determine what needs to be done
- It organises the sequence of micro-operations that need to be performed to execute an instruction
- It uses control signals to determine the operation the ALU will carry out
Clock (4)
- The system clock generates regular clock pulses by emitting a signal that continually oscillates between a low and a high state
- The clock signal is used to synchronise the operations of the processor’s components
- A rising edge is a change from a low state to a high state. The time taken between two sequential rising edges is the clock period and it corresponds to one clock cycle
- The clock speed (measured in Hertz) is the number of clock cycles per second
General-Purpose Registers (3)
- Registers are memory locations inside the processor
- The processor uses registers to temporarily store and access results of operations
- The ALU is connected to a set of general-purpose registers that keep the results of intermediate calculations, that are part of a larger computation
Dedicated Register (2, 1:5)
- Dedicated registers are processor-based registers, which have a specific purpose
- The registers, used in the fetch-execute cycle, are dedicated as each one has a specific role to play in each phase of the cycle
- Examples:
• Program counter (PC)
• Current instruction register (CIR)
• Memory address register (MAR)
• Memory buffer register (MBR)
• Status register (SR)
Program Counter
The PC holds the address of the next instruction to be executed by the processor
Current Instruction Register
The CIR holds the current instruction that the processor is executing
Memory Address Register
The MAR temporarily holds the address of the memory location that the processor needs to access to read from or write to
Memory Buffer Register
MBR temporarily holds the data that has been read from or written to main memory
SR (3)
- The Status Register stores information about the results of the ALU’s last operation
- Each bit in the SR indicates if an error or exception has occurred (e.g., negative / zero results or overflow bits)
- Or to enable or disable interrupts to be raised