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1. Computer Architecture > 6 - Bits, Bytes, Floating Point and Error Detection/Correction > Flashcards

6 - Bits, Bytes, Floating Point and Error Detection/Correction Flashcards

1
Q

How can you use the AND instruction?

A

AND destination, source

It performs a bitwise AND operation. You can compare registers to anything and memory to registers or immediate operands, but NOT memory to memory AND NOT immediate to immediate.

AND reg, reg
AND reg, mem
AND reg, imm
AND mem, reg
AND mem, imm
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2
Q

What is bit masking and why might you use it?

A

Bit masking allows you to clear some of your bits without affecting other bits. For example, if a control byte is about to be copied from the AL register to a hardware device and the device resets itself when bits 0 and 3 are cleared, then we can write the following

and AL, 11110110b ;clear bits 0 and 3, leave others

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3
Q

What effect does the AND instruction have on flags?

A

AND instruction ALWAYS clears the Overflow and Carry flags.

It affects the Sign, Zero, and Parity flags in a way that you’d expect.

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4
Q

How can you easily convert ASCII characters to uppercase?

A

Just “AND” any character with 11011111 binary. For example, this converts all characters in an array to uppercase.

.data
array BYTE 50 DUP(?)
.code
  mov ecx, LENGTHOF array
  mov esi, OFFSET array
L1:
  and BYTE PTR [esi], 11011111b ;clear bit 5
  inc esi
  loop L1
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5
Q

How can you use the OR instruction?

A

OR destination, source

It uses the SAME operand combinations as the AND instruction

OR reg, reg
OR reg, mem
OR reg, imm
OR mem, reg
OR imm

Like with AND, the operands can be 8, 16, 32, or 64 bits, and they MUST be the same size.

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6
Q

Why would you use the OR instruction?

A

When you need to set some bits to 1 without affecting any other bits.

For example, if the computer is attached to a servomotor, which is activated by setting bit 2 in its control byte, then you can say

or AL, 00000100b ;set bit 2, leave others

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7
Q

How does the OR instruction affect flags?

A

The OR instruction ALWAYS clears the Carry and Overflow flags.

It modifies the Sign, Zero, and Parity flags in a way you’d expect.

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8
Q

What are bit-mapped (or bit vector) sets?

A

Essentially, you use bit positions from 0 to 31 to indicate that someone is in the set. You can check for membership by just ANDing that position with 1:

mov eax, SetX
and eax, 10000b ;is element 4 a member?

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9
Q

How can you find the complement of a bit-mapped set?

A

You can use the NOT instruction to reverse ALL bits.

mov eax, Set X
not eax ;complement of SetX

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10
Q

How can you find the intersection of a bit-mapped set?

A

You can use the AND instruction to find which members are in BOTH sets.

mov eax, setX
and eax, setY

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11
Q

How can you find the union of a bit-mapped set?

A

The OR instruction produces a bit map that represents the union of two sets. The following code generates the union of SetX and SetY in EAX.

mov eax, SetX
or eax, SetY

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12
Q

How can you use the XOR instruction?

A

XOR destination, source

It uses the same operand combinations as AND and OR.

One useful property of XOR is that when you XOR something with the second thing twice, it reverts to is original value. This makes it useful for symmetric encryption.

x = (x XOR y) XOR y

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13
Q

How does the XOR instruction affect flags?

A

The XOR instruction ALWAYS clears the Overflow and Carry flags.

It also modifies Sign, Zero, and Parity in a way you’d expect.

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14
Q

How can you use the XOR instruction to check the parity of an 8-bit number without changing its value?

A

You can XOR the number with zero, then check the parity flag.

mov al, 10110101b
xor al, 0 ;parity flag clear
mov al, 11001100b
xor al, 0 ;parity flag set

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15
Q

How can you use the XOR instruction to check the parity of 16-bit number without changing its value?

A

You can XOR the upper and lower bytes. Because the XOR instruction zeros all bits belonging to both, these cancel out, and the parity of the union will be the parity of the whole thing.

mov ax, 64C1h
xor ah, al ;parity flag set

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16
Q

How can you use the NOT instruction?

A

NOT reg
NOT mem

The NOT instruction inverts all bits in an operand. The result is called the one’s complement.

For example, the one’s complement of F0h is 0Fh.

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17
Q

What flags are affected by the NOT instruction?

A

NO flags are affected by the NOT instruction!!

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18
Q

What operand combinations are allowable in CMP?

A

The same operands as in the AND instruction.

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19
Q

How does the CMP instruction affect the flags?

A

The same way that subtraction would have. 1. The carry flag is only set for unsigned operands if the destination is less than the source.
2. The zero flag is only set if they are equal to each other.

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20
Q

How can you use the TEST instruction?

A

The TEST instruction performs an implied AND operation and sets the Sign, Zero, and Parity flags, but TEST doesn’t modify the destination operand.

For example, if you want to test whether bit 0 or bit 3 is set:

test al, 00001001b

The zero flag will only be set if bits 0 and 3 are both set to 0.

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21
Q

Write a single instruction using 16-bit operands that clears the high 8 bits of AX and does not change the low 8 bits.

A

and ax, 00FFh

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22
Q

Write a single instruction using 16-bit operands that sets the high 8 bits of AX and does not change the low 8 bits.

A

or ax, 0FF00h

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23
Q

Write a single instruction (other than NOT) that reverses all the bits in EAX.

A

xor eax, 0FFFFFFFFh

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24
Q

Write instructions that set the Zero flag if the 32-bit value in EAX is even and clear the Zero flag if EAX is odd.

A

test eax, 00000001h

“and” also works, but changes the value of the destination

25
Q

Write a single instruction that converts an uppercase character in AL to lowercase but does not modify AL if it already contains a lowercase letter.

A

or al, 00100000b

26
Q

How does the MUL instruction work?

A

MUL reg/mem8
MUL reg/mem16
MUL reg/mem32

You can multiply two 8-bits by AL, 16-bits by AX, or 32-bits by EAX. The product will be twice their size.

AL*reg/mem8 = AX
AX*reg/mem16 = DX:AX
EAX*reg/mem32 = EDX:EAX

You can check the Carry flag to see whether the upper half can be ignored.

27
Q

How does the IMUL instruction work?

A

IMUL reg/mem8
IMUL reg/mem16
IMUL reg/mem32

This is a signed multiply instruction. Unlike the MUL instruction, it preserves the sign of the product by sign extending the highest bit of the lower half.

Again, the Carry and Overflow flags are set if the upper half isn’t just a sign extension of the lower half.

28
Q

How does the two-operand IMUL format work?

A

IMUL reg16, reg/mem16
IMUL reg16, imm8
IMUL reg16, imm16

IMUL reg32, reg/mem32
IMUL reg32, imm8
IMUL reg32, imm32

The two-operand version of the IMUL instruction stores the product in the first operand, which must be a register. However, it truncates to fit the length of the destination. If it doesn’t fit, the Overflow and Carry flags are set.

29
Q

How does the three-operand IMUL format work?

A

IMUL reg16, reg/mem16, imm8
IMUL reg16, reg/mem16, imm16
IMUL reg32, reg/mem32, imm8
IMUL reg32, reg/mem32, imm8

The three operand formats store the product of the second and third into the first operand. The overflow and carry flags are set if significant digits are lost, so definitely check these!

30
Q

How can you measure program execution times?

A

First, use GetMseconds to record the system starting time, and store that from EAX into a variable. Then, call the program you want to test, and then call GetMseconds again, and subtract EAX from the first call.

31
Q

How are MUL and IMUL like bit shifting?

A

Before, bit shifting used to be much faster. Now, however, MUL and IMUL have been optimized to be equally quick.

32
Q

How does the DIV instruction work?

A

DIV reg/mem8
DIV reg/mem16
DIV reg/mem32

In 32-bit mode, the DIV (unsigned divide) instruction performs 8-bit, 16-bit, and 32-bit unsigned integer division. The single register or memory operand is the divisor.

AX / reg/mem8 = AL, R AH
DX:AX reg/mem16 = AX, R DX
EDX:EAX reg/mem32 = EAX R EDX

33
Q

How can you do signed integer division?

A

First, you need to use sign extend. For example:

CBW (AL into AH)
CWD (AX into DX)
CDQ (EAX into EDX)

34
Q

How can you use the IDIV instruction?

A

This instruction performs signed integer division (and STILL needs to be sign-extended), BUT here, the remainder has the SAME sign as the dividend!!

e.g. 
.data
byteVal SBYTE -48
.code
mov al, byteVal
cbw
mov bl, +5
idiv bl     ;AL = -9, AH = -3
35
Q

How can you get divide overflow?

A

When the quotient will NOT fit into the destination operand.

Therefore, try to use 64-bit dividends and 32-bit divisors to reduce the probability of overflow.

36
Q

How can you prevent division by zero?

A

Test the divisor before dividing

mov ax, dividend
mov bl, divisor
cmp bl,0
je NoDivideZero
div bl
..
NoDIvideZero: ;do error message or something
...
37
Q

How would you implement this into assembly language with unsigned 32-bit integers?

var4 = (var1 + var2) * var3

A 
mov eax, var1
add eax, var2
mul var3
jc tooBig
mov var4, eax
jmp next

tooBig: ;have an error message

38
Q

How would you implement this into assembly using unsigned 32-bit integers?

var4 = (var1*5)/(var2-3)

A

var4 = (var1*5)/(var2-3)

mov eax, var1
mov ebx, 5
mul ebx
mov ebx, var2
sub ebx, 3
div ebx
mov var4, eax
39
Q

How would you implement this into assembly using signed 32-bit integers?

var4 = (var1 *-5)/(-var2%var3)

A 
mov eax, var2
neg eax
cdq
idiv var3
mov ebx, edx
mov eax, -5
imul var1
idiv ebx
mov var4, eax
40
Q

Explain why overflow cannot occur when the MUL and one-operand IMUL instructions execute.

A

The product is twice the size of the original, which will more than accommodate the highest products.

41
Q

How is the one-operand IMUL instruction different from MUL in the way it generates a multiplication product?

A

It preserves the sign of the product by extending the highest bit of the lower half.

MUL, on the other hand, will zero-extend the product!!

42
Q

What has to happen in order for the one-operand MUL to set the Carry and Overflow flags?

A

The answer has to extend into the higher half of the bits.

43
Q

When EBX is the operand in a DIV instruction, which register holds the quotient?

A

EAX

44
Q

When BX is the operand in a DIV instruction, which registers hold the product?

A

AX.

45
Q

Show an example of sign extension before calling the IDIV instruction with a 16-bit operand.

A 
.data
var1 WORD -24
var2 WORD 5
.code
mov ax, var1
cwd
mov bx, divisor
idiv bx
46
Q

What are the three components of a floating point decimal number?

A
  1. sign
  2. significand
  3. exponent

For example, if -1.23154 * 10^5, 1.23154 is the significand.

47
Q

What are the three types of floating point binary storage formats?

A
  1. Single Precision: 32 bits - 1 for the sign, 8 for the exponent, 23 for the fractional part of significand. (i.e. a short real)
  2. Double Precision: 64 bits - 1 for the sign, 11 for the exponent, 52 for the fractional part of the significand (long real)
  3. Double Extended Precision: 80 bits - 1 for the sign, 16 for the exponents, and 62 for the fractional part of the significand. (i.e. extended real)
48
Q

How are single precision exponents represented?

A

The number’s actual exponent must be added to 127. For example, if you compute the binary value 1.101 * 2^5, the biased exponent (132) is stored (10000100).

The point of this is to prevent the smallest exponent’s reciprocal from overflowing (b/c the range is always positive).

49
Q

How are normalized binary floating-point numbers represented?

A

You can normalize a binary number by shifting the binary point until a single “1” appears to the left of the binary point, and the movements are expressed as exponents.

e.g. 1110.1 = 1.1101 * 2^3

50
Q

How can you denormalize value?

A

You simply shift the binary point until the exponent is zero.

51
Q

How would you represent -.00101 as a binary IEEE short real?

A

This will become -1.01 * 2^-3

First, the sign bit = 1. Second, the exponent will equal -3 + 127 = 124, or 01111100. Third, the the part after the decimal is just 01, so the fraction bits are 01000000000000000000000

52
Q

What happens when the result becomes too close to zero?

A

The FPU shifts the binary point to a normalized position. For example, if the FPU computes 1.0101111 * 2^-129, the exponent is too small to be stored, so the number is gradually denormalized by shifting until the exponent reaches -126 => 0.00101111 * 2^-126.

53
Q

What happens when the result becomes too large or too negative?

A

It becomes positive (sign = 0) or negative infinity (sign = 1).

For both, the exponent is 11111111 and the significand is 00000000000000000000000.

54
Q

What does NaN mean?

A

These are bit patterns that do NOT represent a valid real number.

A quiet NaN can propagate through most arithmetic operations without causing an exception. (e.g. you can use this to hold diagnostic information)
Sign = x, Exponent = 11111111, and significand = 1xxxxxxxxxxxxxxxxxxxxxx.

A signaling NaN can be used to generate a floating-point invalid operation exception. (e.g. a compiler can use this for an uninitialized array). Sign = x, Exponent = 11111111, and significand = 0xxxxxxxxxxxxxxxxxxxxxx.

55
Q

Why doesn’t the single-precision real format permit an exponent of -127?

A

Because if you found its reciprocal (+127), you’d get an overflow.

56
Q

Why doesn’t the single-prevision real formal permit an exponent of +128?

A

Adding +128 to the exponent bias would generate a negative value.

57
Q

In the IEEE double-precision format, how many bits are reserved for the fractional part of the significand?

A

52 bits.

58
Q

In the IEEE single-precision format, how many bits are reserved for the exponent?

A

8 bits

1. Computer Architecture (11 decks)

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