5 Flashcards

1
Q

Protection

A

-process can only access addresses in its address space
-using a pair of base and limit registers

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2
Q

modes for our cpu

A

user mode, kernal mode

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3
Q

address protection

A

cpu must check every memory access generator in user mode to ensure its between base and limit for that user
-instructions to load base and limit registers privileged

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4
Q

Address Binding

A

Program on disk ready to be brought into memory to execute form an input queue
-source code adresses symbolic
-compiled code bind to relocatable addresses
-each binding step maps one address space to another

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5
Q

Logical address

A

generated by the CPU, aka virtual address, address space is set of all logical addresses generated by a program

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6
Q

physical address

A

address seen by memory unit, address space is set of all physical address space generated by a program

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7
Q

Fragmentation - external

A

External - total memory space may exist to satisfy a request, not contagious. approaches like compaction - shuffle memory contents to put free memory next to each other

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8
Q

Fragmentation - Internal

A

allocated memory may be larger than requested memory, size difference is memory internal to a partition, but not being used - both internal and external wasteful - paging better

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9
Q

Paging

A

Physical address space of a process can be noncontiguous, process allocated physical memory where available
- avoids extermal fragmentation
- avoids problem of varying sized memory chunks

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10
Q

whats pages divided into

A

fixed size blocks called frames, size is power of 2 between 512 bytes and 16Mb

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11
Q

To run a program of N pages how many frames we need

A

N

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12
Q

address translation scheme

A

divided into page number - index into page table which contains base address of each page in physical memory
page offset - combined with base address to define physical memory

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13
Q

where is page table

A

kept in main memory
-PTBR Page-table base register points to the page table
PTLR Page table length register indicates size of page table

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14
Q

Translation Look-Aside Buffer

A

Store adress-space identifers in each TLB entry, these uniquely identify each process to provide address-space protection

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15
Q

effective access time

A

Hit ratio - percentage of times page number found in TLB

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16
Q

Shared pages

A

one copy of read-only code shared among processes
each process keeps separate coipy of code and data

17
Q

Structure of page table

A

-Hierarchial Paging
-Hashed Page Tables
-Inverted Page tables

18
Q

Hierarchical page tables

A

Break up logical address space into multiple page tables
two level page table

19
Q

Hashed page tables

A

common in address spaces > 32
page number hashed into page table

20
Q

swapping

A

process can be temporarily swapped out of memory to a backing store, then brought back into memory

21
Q

backing store

A

fast disk large enough to accomodate copies of all memory images for all users
system maintains a ready queue of processes have memory images on disk