4.7.3 Structure and Role of the Processor Flashcards

1
Q

Which type of register is the status register: general purpose or special
purpose?

A

Special purpose

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2
Q

Which of the following is not found within a processor?
A: Control unit
B: Main memory
C: Buses

A

B: Main memory

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3
Q

What effect does increasing the width of the address bus have?

A

Increases the computer’s amount of addressable memory

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4
Q

Which register holds the instruction that is currently being executed by the
processor?

A

Current instruction register

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5
Q

What is cache?

A

A small portion of fast memory used to store frequently used information in the processor.

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6
Q

What name is given to small storage locations used to hold data temporarily in the processor?

A

Registers

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7
Q

What is meant by this assembly language instruction?
STR R3, 38

A

Store the value that is in register 3 into
memory location 38.

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8
Q

Which register holds the contents of a memory location that has been read from or data that is to be stored?

A

Memory buffer register

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9
Q

Which part of a computer’s processor generates signals at a regular frequency?

A

Clock

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10
Q

Which special purpose register is abbreviated as MAR?

A

Memory address register

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11
Q

Name the three stages of the fetch-execute cycle

A

Fetch, decode, execute

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12
Q

Form an assembly language instruction that would mean: “Add the value in register 4 to the value in register 5 and store the result in register 3”

A

Form an assembly language instruction that would mean: “Add the value in register 4 to the value in register 5 and store the result in register 3”
ADD R3, R4, R5

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12
Q

What name is given to the data to be used in an instruction: opcode or operand?

A

Operand

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13
Q

In which stage of the fetch-execute cycle
is the program counter incremented?

A

Fetch

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14
Q

Between which two stages of the fetch-execute cycle is the status register checked?

A

Execute and Fetch

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15
Q

In which addressing mode does the value specified by an operand signify a memory address?

A

Direct Addressing

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15
Q

What name is given to the group of
instructions that a processor can carry out?

A

Instruction set

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16
Q

What name is given to a signal sent to
the processor by another part of the
computer requesting the attention of the
processor?

A

Interrupt

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16
Q

In which stage of the fetch-execute cycle
is an instruction broken into opcode and operands?

A

Decode

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17
Q

What is Address Bus Width?

A
  • Width of bus relates to number of parallel wires that make up the bus.
  • Increasing the width of the address bus increases the range of addresses that it can specify, increasing computer’s amount of addressable memory.
  • Adding a single wire doubles the number of addressable memory locations
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18
Q

What is Data Bus Width?

A
  • Increasing width of data bus increases the volume of data that can be transferred over the bus at any one time.
  • A wider data bus allows Processor to fetch more data from main memory in one cycle of the FDE cycle, reducing number of cycles needed to fetch large volumes of data.
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19
Q

Detail the Check for Interrupts

A
  • Between each execute stage and fetch stage of the FDE cycle, the content of the status register is checked
  • The Status Register (SR) is checked for changes that could signify the occurrence of an interrupt.
20
Q

Detail the parts of this:

0 1 1 0 1 1 0 1

A

Opcode: 0110
Operation: 011
Addressing Mode: 0 (4th one)
Operand: 1101

21
Q

What is the Control Bus?

A
  • Bi-directional bus
  • Data and Address buses are shared by all components of the system. Control lines must therefore be provided to ensure that access to and use of these buses by different components doesn’t lead to conflict.
  • Control Line examples could be: Memory Write, Interrupt Request, Bus Grant, Reset etc.
21
Q

What is the Data Bus?

A
  • Bi-Directional
  • Typically has 8, 16, 32, 64 separate lines
  • Width of the data bus is a key factor in determining overall system performance:
  • If data bus is 8 bits wide, and each instruction is 16 bits long, the processor must access the main memory twice just to fetch the instruction.
  • Transfers data between a computer’s memory and its CPU
22
Q

What is Clock Speed?

A
  • Clock Speed relates to frequency of the pulses generated by system clock
  • Increased frequency means more FDE cycles can be completed in same period of time.
  • Errors can occur when Computer’s clock speed is increased too far
22
Q

What is the Address Bus?

A
  • One-Directional (unidirectional) Bus
  • Memory is divided internally into units called Words
  • Each word in memory has its own specific address
  • When processor wishes to read a word of data from memory it first puts the address of the desired word on the address bus.
  • The width of the address bus determines the maximum possible memory capacity of the system. For example: if the address bus had only 8 lines, the maximum address it could transmit would be 255 or 11111111 in binary. Giving max of 256 including address 0.
  • Address bus is also used to address I/O ports during input/output operations.
22
Q

What are the three electronic circuits making up I/O Controller

A

The Controller is an electronic circuit board consisting of 3 parts:
1) An interface that allows connection of the controller to the system
2) A set of data, command and status registers.
3) an interface that enables connection of the controller to the cable connecting the device to the computer.

23
Q

What is Number of Cores?

A
  • Directly affects computer performance
  • each core can do the FDE cycle independently
  • different applications for different cores
  • quad-core and octo-core now more common
23
Q

What is an I/O controller?

A
  • An I/O Controller is a device which interfaces between an input or output device and the [processor. Each device has a separate controller which connects to the control bus.
  • The I/O controllers receive input and output requests from the processor and then send device-specific control signals to the device they control.
  • They also manage the data flow to and from the device
  • The Controller is an electronic circuit board consisting of 3 parts.
23
Q

What is Word Length?

A
  • A word is a group of bits treated as a single unit by the processor
  • Fixed size group of digits, typically 8, 16, 32 or 64 bits.
  • Words can be used to represent both instructions and data
  • Length of word is the number of bits assigned to it
  • More word length allows for more bits to be transferred and manipulated as a single unit
24
Q

What is the Program Counter (PC)?

A
  • Used to hold memory address of the next instruction to be executed in FDE cycle.
24
Q

What is Cache Memory?

A
  • processor’s cache is small portion of incredibly fast memory
  • read and write speeds far higher than hard disk drives or SSDs.
    Cache used to store frequently used information, reducing time wasted from fetching instruction every time from main memory.
  • More Cache of processor has, more information it can store, more time to can save fetching info from main memory.
25
Q

What is the Current Instruction Register (CIR)?

A
  • Holds the instruction that is currently being executed by the processor.
26
Q

What is the Memory Address Register (MAR)?

A
  • Stores Memory Address of a Memory Location that is to be read from or written to
27
Q

What is the Memory Data Register (MDR)?

A
  • Also called Memory Buffer Register (MBR)
  • Holds the contents of a memory location that has been read from or data that is to be stored.
28
Q

What is the Status Register (SR)?

A
  • Contains a number of bits
  • Provides information about the result of the last instruction
  • To control conditional branch instructions
  • Checks the value of the bits which can indicate the occurrence of an interrupt
29
Q

What is the Clock?

A
  • Inside a CPU is the system clock
  • System clock generates a timing signal which changes at a regular frequency.
  • This signal is used to synchronise communication between the components of the processor and the rest of the computer system.
30
Q

Detail the FETCH Stage of the FDE

A

1) Contents of the PC is copied to the MAR
2) Contents of the MAR is transferred to main memory by the address bus
3) The instruction is sent from main memory to the MDR by the data bus
4) The PC is incremented by one
5) THe content of the MDR is copied to the CIR

31
Q

Detail the DECODE Stage of the FDE

A

1) The contents of the CIR is decoded by the control unit (CU)
2) The decoded instruction is split into two parts: opcode and operands

32
Q

Detail the EXECUTE Stage of the FDE

A

1) Any data required by the instruction that isn’t present in registers is fetched
2) The instruction is carried out
3) Results of any calculations are stored in general purpose registers or main memory

33
Q

What is a Bus?

A

A set of parallel wires connecting two or more components of a computer

34
Q

What is Von Neumann Architecture?

A
  • Both data and instructions are held in the same memory.
  • E.g.: 10 * 12, all get stored in one set of memory, one set of buses. Memory and Data are stored in the same memory.
35
Q

What is Harvard Architecture?

A
  • Two sets of memory, two sets of buses for Harvard. Memory and Instructions are stored in different memory.
  • E.g.: 10 12, 10 and 12 in data whereas the () in instructions.
36
Q

What is an Interface?

A
  • A standardized form of connection defining such things as signals, number of connecting spins/sockets and voltage levels that appear at the interface.
  • An example is a Universal Serial Bus (USB) connection, which can be used with many different peripherals.
37
Q

What is a General Purpose Register?

A
  • Up to 16 general purpose registers in CPU
  • All arithmetic, logical or shift operations take lace in registers.
  • Another word for Accumulator
37
Q

What is the stored program concept?

A
  • Program Instructions are transferred from backing store to main memory
  • Program consists of a sequence of instructions
  • Program is stored in main memory and can be replaced by another program at any time
  • Instructions are fetched in sequence, decoded and then executed.
38
Q

Direct Consequence of increasing data bus width?

A
  • Increases the number of bits that can be transferred at one time
  • Increased rate of data transfer
39
Q

Direct Consequence of increasing address bus?

A
  • Increases the number of memory addresses, addressable locations
  • Increase the maximum amount of primary storage
40
Q

What is the difference between RISC and CISC processors?

A

RISC (Reduced Instruction Set Computing): Uses a small, simple set of instructions that can be executed quickly.

CISC (Complex Instruction Set Computing): Uses a larger, more complex set of instructions, which may take longer to execute but can perform more work in a single instruction.

41
Q

What is an interrupt in the context of a processor?

A

An interrupt is a signal that temporarily halts the processor’s current operation to address a higher-priority task or event (such as I/O operations), after which the processor returns to its previous task.

42
Q

What is the Stored Program Concept?

A

The Stored Program Concept refers to the idea that a computer’s program instructions (code) and the data it processes are both stored in the computer’s memory, allowing the processor to fetch and execute instructions sequentially.

43
Q

What are peripherals in computing?

A

Peripherals are external devices that are connected to a computer to provide additional functionality or enhance the capabilities of the computer. They can be input devices, output devices, or storage devices.

44
Q

Draw Diagram of FDE Cycle