4.7 Computer organisation and architecture

Question 1

Describe 3 box model (Von Nueman)

Answer 1

Processor, Main memory and Input/Output connected by buses.

Question 2

What is main memory

Answer 2

Memory directly addressable by processor

Question 3

What is RAM

Answer 3

Volatile memory that can be read or written to in any order

Question 4

What is an I/O controller and what does it do ?

Answer 4

Circuit board connected to the bus and I.O device to communicate with processor (Eg. correct I and V)

Question 5

What are system buses and what do they do ?

Answer 5

Parallel wires connecting components as signals.

Question 6

What are data buses and what do they do ?

Answer 6

Bi directional buses carrying data between components.

Question 7

What are address buses and what do they do ?

Answer 7

Uni directional bus btwn address memory and I/O locationsaway from the processor

Question 8

What are control buses and what do they do ?

Answer 8

Bi directional bus relaying control signals btwn components (Eg. keeping clock in time.)

Question 9

What is the stored programme concept ?

Answer 9

Program must reside in main memory to be executed. Fetched and decoded sequentially.

Question 10

Harvard Vs. Von Nueman

Answer 10

Harvard:
Faster, Multitasking and no competition for bus.
Good for stand alone machines as fixed proportions of capacity for processing instructions and data.
Von Nueman:
Cheaper
Adaptable to change as all in main memory
Good for general purpose as no fixed proportions for capacity processing instructions and data.

Question 11

Fetch (Fetch decode execute cycle)

Answer 11

PC holds address of next instruction to be executed.
Copies address to MAR.
MAR (Address bus) —> Main memory
Instruction held at address (Data Bus)
—> Memory Buffer Register
Pc increments to hold address of next instruction

Question 12

Decode (Fetch decode execute cycle)

Answer 12

MBR contents copied to CIR and decoded by CU.

Question 13

Execution - What does the ALU do ?

Answer 13

Logic or Calculations

Question 14

What is the clock and what does it do ?

Answer 14

Continuous sequence of pulses to step CU through its operations

Question 15

What is a Register and what does it do ?

Answer 15

Fast, on-processor, temporary storage of binary values.

Question 16

What is an instruction set and what does it do ?

Answer 16

Binary code for machine operations the processor performs. Processor reads machine code. Interpreted into assembly language for readability based on processors instruction sets.

Question 17

Name 4 components that effect processor performance

Answer 17

ANY FROM : No. Cores . Cache memory, clock speed, word length, data bus width and address bus width.

Question 18

How does the no. cores effect processor performance

Answer 18

Each can perform its own FDE cycle independently so each core is allocated to running a different application allowing it run faster.

Question 19

How does the amount of cache memory effect processor performance ?

Answer 19

Cache has higher read and write speeds so more cache reduces fetches required to retrieve info from main memory saving time.

Question 20

How does clock speed effect processor performance ?

Answer 20

Freq. of pulses that keep machine in time. Higher freq. pulse –> higher freq. FDE cycle.

Question 21

How does word length effect processor performance ?

Answer 21

Word (group of bits treated as one unit by processor).
Word Length (number of bits per word).
Higher word lengths –> more bits transferred.

Question 22

How does address bus width effect processor performance ?

Answer 22

Increase width (no. parallel wires) –> Increase range of addresses –. increase addressable memory.
Each wire doubles addresses available.

Question 23

How does data bus width effect processor performance ?

Answer 23

Increase width –> Increase volume of data transfer at any one time allowing processor to fetch more data –> reduces no. FDE cycles req.

Question 24

What is an interrupt?

Answer 24

A signal requesting the attention of the processor that is detected as a change in the status register btwn. F=E in FE cycle.

Question 25

What is an interrupt service routine ?

Answer 25

Instructions for handling a specific interrupt.

Question 26

Describe the vectored interrupt method ?

Answer 26

Processor stops executing program and places the registers contents onto the system stack (Saving Volatile Environment). Loads appropriate Interrupt service routine. Restores volatile environment from system stack and resumes execution of the program.