2 . Memory Management Flashcards

1
Q

What is in memory ?

A

data

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
2
Q

Is it good for cpu and memory to be synchronous?

A

Yes because asynchronous communication will make us lose cycles between cpu and memory

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
3
Q

What are the types of memory ?

A
  1. SRAM
  2. DRAM
How well did you know this?
1
Not at all
2
3
4
5
Perfectly
4
Q

Which is faster , sram or dram ?

A

SRAM is faster but expensive it needs consistent power

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
5
Q

Why SRAM is expensive than DRAM ?

A

SRAM needs 6 transistors with power to store 1 bit

DRAM needs 1 transistors per 1 bit

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
6
Q

Why it is called dynamic ram ?

A

Because it needs to get refreshed once the capacitors started losing energy , sense amplifer will read them and write them back to the capacitor

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
7
Q

Why it is called dynamic ram ?

A

Because it needs to get refreshed once the capacitors started losing energy , sense amplifer will read them and write them back to the capacitor

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
8
Q

What is write through cache in memory ?

A

When cpu going to write , it will write to sense amplifer and sense amplifer will write to the capacitor

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
9
Q

How the cpu reads from memory ? Does it read directly from the capacitors ?

A

Cpu ping the sense amplifer and the sense amplifer will read the capacitor , you CAN NOT read directly from capacitor

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
10
Q

Which is faster SDRAM or DRAM ?

A

SDRAM , because the DRAM is are slow of the missed cycle speed between cpu and memory

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
11
Q

What is DDR SDRAM ?

A

double data rate SRAM which allows receiveing and sending in each cycle between cpu and memory

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
12
Q

Can a cpu fetch 1 byte from memory in DDR4 ?

A

No it must read 64 bytes which are the 64 pins

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
13
Q

What is the difference between DDR4 and DDR5 ?

A

DDR4 : has one bus with 64 pin
DDR5: has two buses splited into two channels each channel has 32 pin io bus

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
14
Q

When cpu read memory and it reads 64 bytes , where are they cached to ?

A

They are cached into the L1 cpu cache

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
15
Q

What is the difference between capacitors and transistors ?

A

Capacitors contain a charge 0/1 , transistor is a gate to access the capacitors

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
16
Q

What are the rows and columns in memory ?

A

Rows : bunch of memory cells (capacitors )

Columns : contains a bunch of memory cells connected to a sense amplifier

17
Q

What are the rows and columns in memory ?

A

Rows : bunch of memory cells (capacitors )

Columns : contains a bunch of memory cells connected to a sense amplifier

18
Q

Where most of the mapping tables stored in ?

A

Inside the kernel

19
Q

Why using shared memory ?

A

1 firefox app , 5 tabs of the same thing , the data section is the same and static variables are the same , why reserve new space for duplicate things ? Just share it.

20
Q

What happen when we run out of memory ?

A

The process that are not accessed for a while will be offloaded to disk

21
Q

How virtual memory manager swaps ?

A

Virtual memory update the page table to point to the disk instead of physical memory

22
Q

Why is DMA ?

A

Direct memory access is a way for devices to read/write to memory without going through the cpu for latency purposes

23
Q

What piece makes the DMA work ?

A

DMA Controller , a buffer of physical addresses

24
Q

Who does the translation between virtual address and physical address ?

A

MMU

25
Q

Why the DMA must he physical addresses ?

A

Because it does not have MMU