1E Flashcards
Digital circuits operate using only two voltage levels for all of their input and output signals. __V and __V are commonly used.
0V and +5V
This two-state design allows us to use the ___ ___ ___ with digital circuits. The binary system uses two digits: 0 and 1. In most digital circuits, binary 0 represents 0V and binary 1 represents +5V.
binary number system
Calculators and computers that process binary numbers use decision-making elements called ___ ___.
logic gates
Logic gates can have many input signals, but they only have ___ output.
one
In order to easily identify logic gates and simplify circuit diagrams, pictorial symbols are used to represent each gate function. There are six basic logic gates. They are:
AND
Negated AND (NAND)
OR
Negated OR (NOR)
Exclusive OR (XOR)
Exclusive NOR (XNOR)
A ___ has at least two inputs, only one output and performs a logic function. The ___ is an elementary building block of digital circuits.
Gate
An elementary processing function, such as AND, OR, NAND and NOR, in a digital circuit. ___ ___ and logic circuit are used synonymously.
Logic Function
A ___ ___ is a pictorial representation of a logic function. A symbol does not indicate any particular components but does indicate the function.
Logic Symbol
A ___ ___ is a voltage value that is used to represent a binary 1 or binary 0 in digital circuits. In digital circuits, the voltage level used to indicate a 1 (High) is the most positive voltage in the circuit, while a 0 (Low) is the least positive voltage in a circuit. For example, a circuit High could be +5V, while the Low could be 0V.
Logic Level
A ___ ___ shows all possible logic input combinations for a logic
gate, and the resulting outputs. Figure 1-161 shows a ___ ___ for a two-input gate and resultant outputs. Inputs for a ___ ___ logic levels are represented by logic level Low (0) and High (1). As indicated earlier, gates must have at least two inputs, but may have more. Note: L (for Low) or 0 and H (for High) or 1 will be used in a ___ ___, but not both at the same time.
truth table
A ___ ___ is a circle on either input that tells us that a logic level Low (0) is required to satisfy that input of the gate.
negation indication
Looking at Figure 1-162, the presence of a negation indicator on the A input indicates that a logic level Low is required to satisfy the A input. The absence of a
negation indicator, shown on the B input, indicates a logic level High (1) is required to satisfy the B input. Therefore, to produce the desired logic level High at the X output of this gate, input A must be a logic level Low (0) and input B must be a logic level High (1). When a gate has a negation indicator on any input, the gate is called an ___ ___.
Inhibited Gate
Some gates use a negation indicator on the output, as shown in Figure 1-163. The presence of a negation indicator on the output indicates that a logic level Low will be present at the X output when the logic inputs are satisfied. In this case, the inputs A & B require a High to satisfy them so that the gate to produce a logic level Low at the X output. When a gate has a negation indicator on its output, the gate is called a ___ ___.
Negated Gate
An AND gate requires that ___ input conditions must be met to get the desired output. Think of it like this: the conditions of Input A AND Input B must be met to get the desires output. If the gate had three
(3) inputs, then the conditions of Input A AND Input B AND Input C must be met to get the desired output.
ALL
Since there are no negation indicators, both inputs must be logic level ___ to satisfy the gate and produce a logic level High output. When looking at the truth table for this AND gate, it is apparent that only one combination will produce the desired output (logic level High), and that is when Input A is a logic level 1 AND when Input B is a logic level 1. When either input is a logic level 0, that input is not satisfied, causing the gate will produce a logic level 0 output. Review the four (4) possible input combinations for the truth table and note that there is only one input combination which produces a logic level 1 output, and there are three (3) input combinations which produce a logic level 0 output.
High
Figure 1-166 shows a Negated AND (NAND) gate and its truth table. Note the negation indicator (the circle) on the output. The NAND gate produces a logic level Low when all inputs are satisfied with a logic level High. The function is still the AND function because all inputs ___ ___ ___ to get the desired output of logic level Low. Note this gate operation produces the inverse output of the previous AND gate of Figure 1-164.
must be satisfied
The symbol shown in Figure 1-167 is an ___ ___ ___ with its truth table. The Inhibited NAND gate produces a logic level 0 output when the A input is satisfied with a logic level 0, AND the B input is satisfied with a logic level 1. Again, the function is still the AND function because all inputs must be satisfied to get the desired output of logic level 0. Refer to the truth table in Figure 1-167 as each row is explained here. In the first row, the A input is logic level 0, which satisfies the input. However, the B input is also a logic level low, which does not satisfy the input. Since only one input is satisfied, the produces a logic level high output. This is not the desired Low output, as indicated by the negation indicator on the output. In row the second row, there is a logic level Low on input A, which satisfies the input, and a logic level High on input B, which satisfies this input. Therefore, since both inputs are satisfied, the NAND gate produces the desired logic level Low output at X. In the third row, Input A is High, and input B is Low, so, again, the output is a High because neither input is satisfied. Finally, in the fourth row, Input A is High, which does not satisfy Input A, and Input B is High, which does satisfy Input B. However, the output is High because both inputs are not satisfied.
Inhibited NAND gate
In Figure 1-168, the symbol shown is used to represent the OR function. The symbol’s distinctive shape indicates there is an OR relationship between the input requirements needed to
produce the desired output. The OR gate produces a logic level High when any input is satisfied with a logic level High 1. In other words, if Input A OR Input B is satisfied, the desired output will be produced. If the gate had three inputs, then if Input A OR Input B OR Input C were satisfied, the desired output would be produced. An OR gate will produce the desired output unless none of the inputs are satisfied. The OR gate’s truth table shows this. If either input A OR input
B OR both inputs are satisfied, then the desired outcome, a logic level High, will be produced.
OR Gate
The Negated OR (NOR) gate has a negation indicator symbol on the output as show in figure 1-169. The truth table shows that the NOR function will produce a logic level 0 anytime one or more of the input variables is at a logic level 1. The logic operation is still an OR operation, but the desired output is now a logic level 0. Comparing the truth tables for the NOR gate (Figure 1-169) and the OR gate (Figure 1-168), we see the outputs are the inverse of each other.
The Negated OR (NOR) Gate
An Inhibited NOR gate can have a negation indicator drawn on any or all inputs and on the output. Figure 1-170 is an Inhibited NOR gate with its truth table. The truth table illustrates that
the NOR gate will produce a logic level Low (0) anytime one or more of the inputs variables are satisfied. For this gate, the inputs are satisfied when input A is Low OR input B is High. Note that the only time a High output is produced is when neither input is satisfied as shown in the third row of the truth table.
Inhibited NOR gate
Another common logic gate is called the Exclusive OR (XOR). Figure 1-171 depicts the symbol for an XOR gate and its truth table. The XOR gate will never have more than two inputs and will only produce the desired logic level High output when the two inputs are different. When both input logic levels are the same, as shown in the truth table, the output is a logic level Low. As we examine the truth table for the XOR gate in Figure 1-171, remember the XOR gate will always have four possible input combinations. When inputs A and B are opposite levels, the desired output is High. Rows two and three show this. When inputs A and B are the same level, the output will be the undesired Low. Rows one and four show this.
Exclusive OR (XOR) Gate
In Figure 1-172, note the negation symbol on the output. This is an Exclusive Negated OR (XNOR) gate. The XNOR gate, like the XOR, has only two inputs. However, when the input conditions are met, this gate produce a logic level 0 output. When the input logic levels are different, as shown on rows two and three of the truth table, the input conditions are met, yielding the output logic level 0. When the input logic levels are the same, as shown on rows one and three of the truth table, the XNOR gate yields a logic level 1 output, which is undesired.
Exclusive Negated OR (XNOR) Gate
A ___, Figure 1-173, is a type of logic symbol used to isolate conventional gates from other circuits and to amplify the signal applied to its input. The ___ does not alter the state of the signal. If a logic level 1 is applied to the input, then a logic level 1 is developed on the output. The ___ also provides isolation, or buffering, between a digital circuit and any circuit connected to its output without loading down the input of the ___.
buffer
An ____, Figure 1-174, looks very similar to the buffer with one exception; it has a negation indicator on either the input or the output of the device. It is called an inverter because the output level is the inversion of 180° from the input state. In other words, if the input is a High logic level
then the output is a Low logic level. Therefore, the inverter complements the input value at the output.
inverter
