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iGCSE Comp Sci Rendcomb 22 > 1.3.2 Computer Architecture > Flashcards

1.3.2 Computer Architecture Flashcards

1
Q

What are the 5 registers used in the Von Neumann architecture?

A
  • Program counter (PC)
  • Memory address register (MAR)
  • Memory data register (MDR)
  • Current instruction register (CIR)
  • Accumulator (ACC)
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2
Q

What is the purpose of the ALU?

A

Arithmetic Logic Unit

  • Carries out calculations on data e.g.
    • arithmetic operations: add, subtract …
    • logical operations: AND, OR …
  • Holds temporary values used during calculations …
    • .. in a register called the accumulator (ACC)
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3
Q

What is the purpose of the Control Unit (CU)?

A

Control Unit

  • It contains the Current Instruction Register (CIR) and the Program Counter (PC).
  • Manages the flow of data and interaction between the components of the processor
  • Signals are generated along the control bus to tell the components of the computer what to d
  • Reads/fetches instructions from memory
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4
Q

What is the IAS?

A

Immediate Access Store

  • Used to hold data and instructions before they are processed e.g. registers, RAM, cache
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5
Q

Purpose of the Program Counter (PC)?

A
  • Contains the address of the next instruction to be fetched
  • Increments to point to the address of the next instruction to be fetched
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6
Q

Purpose of the Memory Address Register (MAR)

A
  • Holds the address(location) of the current instruction/data to be fetched
  • The contents of the PC are copied here and …
    • … then transferred along the Address Bus
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7
Q

Purpose of the Memory Data Register (MDR)?

A
  • Temporary storage between the Central Processing (CPU) and primary memory
  • Contains the instructions/data after it is fetched from main memory
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8
Q

Purpose of the Current Instruction Register (CIR)?

A
  • Contains the instructions to be decoded
  • It is copied from the MDR
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9
Q

Purpose of the accumalator (ACC)?

A

Holds data (temporarily) that is currently being used in calculations by the Logic Unit

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10
Q

What are the 3 buses used in the Von Neumann architecture?

A
  • Address bus
  • Control bus
  • Data bus
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11
Q

What is the purpose of the 3 buses used in the Von Neumann architecture?

A
  • Buses are used to connect together the internal components of the CPU
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12
Q

Purpose of the address bus?

A
  • Transports the memory address …
    • … between processor and memory
    • … of the next item to be fetched
  • Data travels one way (unidirectional) CPU -> Memory
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13
Q

Purpose of the control bus?

A
  • Carries (transports) signals …
    • … that control the actions of the CPU
    • … that synchronise the fetch-execute cycle
  • Data can travel one way (unidirectional) or both ways (bidirectional)
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14
Q

Purpose of the data bus?

A
  • Carries (transports) data …
    • … that is currently being processed
    • … between processor, memory and peripherals(input/output devices)
  • Data travels both ways (bidirectional)
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15
Q

Explain how an instruction is fetched in a computer based on the Von Neumann model

A
  • PC contains the address of the next instruction to be fetched
  • The address held in the PC is copied to the MAR … and placed on the address bus
  • The instruction is transferred to the MDR from the memory location contained in the MAR … using the data bus
  • The instruction in the MDR is copied to the CIR
  • The PC is incremented by 1
  • The instruction is then decoded and executed by the Control Unit
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16
Q

Describe the stored program concept when applied to the Von Neumann model?

A
  • Program stored on a secondary storage device
  • Data & instructions are moved to RAM/Memory
  • Data & Instructions are stored in the same memory
  • Data & instructions are moved to registers to be executed
  • Instructions are fetched one at a time and executed one after another
17
Q

To process instructions the CPU goes through 3 main stages. What are they?

A
  • Fetch
  • Decode
  • Execute
18
Q

What is being described?

  • Carries out calculations on data e.g.
    • arithmetic operations: add, subtract …
    • logical operations: AND, OR …
  • Holds temporary values used during calculations …
    • .. in a register called the accumulator (ACC)
A

Arithmetic Logic Unit

19
Q

What is being described?

  • It contains the Current Instruction Register (CIR) and the Program Counter (PC).
  • Manages the flow of data and interaction between the components of the processor
  • Signals are generated along the control bus to tell the components of the computer what to d
  • Reads/fetches instructions from memory
A

Control Unit (CU)

20
Q

What is being described?

  • Used to hold data and instructions before they are processed e.g. registers, RAM, cache
A

Immediate Access Store (IAS)

21
Q

What is being described?

  • Contains the address of the next instruction to be fetched
  • Increments to point to the address of the next instruction to be fetched
A

Program Counter (PC)

22
Q

What is being described?

  • Holds the address(location) of the current instruction/data to be fetched
  • The contents of the PC are copied here and …
    • … then transferred along the Address Bus
A

Memory Address Register (MAR)

23
Q

What is being described?

  • Temporary storage between the Central Processing (CPU) and primary memory
  • Contains the instructions or data after it is fetched from main memory
A

Memory Data Register (MDR)

24
Q

What is being described?

  • Contains the instructions to be decoded
  • It is copied from the MDR
A

Current Instruction Register (CIR)

25
Q

What is being described?

  • Holds data (temporarily) that is currently being used in calculations by the Logic Unit
A

Accumalator (ACC)

26
Q

What is being described?

  • Transports the memory address …
    • … between processor and memory
      • … of the next item to be fetched
  • Data travels one way (unidirectional)
A

Address Bus

27
Q

What is being described?

  • Carries (transports) signals …
    • … that control the actions of the CPU
    • … that synchronise the fetch-execute cycle
  • Data can travel one way (unidirectional) or both ways (bidirectional)
A

Control bus

28
Q

What is being described?

  • Carries (transports) data …
    • … that is currently being processed
    • … between processor, memory and peripherals(input/output devices)
  • Data travels both ways (bidirectional)
A

Data bus

29
Q

What is being described?

  • PC contains the address of the next instruction to be fetched
  • The address held in the PC is copied to the MAR … and placed on the address bus
  • The instruction is transferred to the MDR from the memory location contained in the MAR … using the data bus
  • The instruction in the MDR is copied to the CIR
  • The PC is incremented by 1
  • The instruction is then decoded and executed by the Control Unit
A

Fetching an instruction in the Von Neumann model

iGCSE Comp Sci Rendcomb 22 (17 decks)

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