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CSE 230 > 128 > Flashcards

128 Flashcards

1
Q

Select which of the following are part of the compilation process:

A

Lexical Analysis, Syntax Analysis, Optimization, linking, code generation

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2
Q

In the compilation process, the ______ performs program analysis and optimization.

A

Middle Stage

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3
Q

Which of the follow best matches the definition for Syntax Analysis?

A

Performs syntax rules checking and constructs a symbol table and abstract syntax tree.

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4
Q

Which of the follow best matches the definition for Lexical Analysis?

A

Separates the input source code text into tokens.

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5
Q

Which of the follow best matches the function of the Middle Stage in the compilation process?

A

Performs program analysis and optimization.

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6
Q

In the compilation process, the ______ separates the input source code text into tokens.

A

Lexical Analyzer (lexer)

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7
Q

A computer consists of five major modules. What module do registers belong to?

A

Data Path

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8
Q

The ______ of the CPU stores a small number of pieces of information, commonly the temporary results of calculations.

A

Registers

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9
Q

Which of the following best matches the definition of the Bus?

A

Carries data between the ALU, registers, memory, and peripherals.

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10
Q

The ______ of the CPU acts as an interface between the processor and the outside world, including long-term storage and user interfaces.

A

IO / Peripherals

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11
Q

A computer consists of five major modules. What module does ALU belong to?

A

Data Path

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12
Q

If two computers made by different companies have the same machine language, that means they have the same:

A

Architecture

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13
Q

Which of the following best matches the definition of the Datapath?

A

Contains the ALU and Registers, and the interconnection between them.

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14
Q

The ______ of the CPU carries data between the ALU, registers, memory, and peripherals.

A

Bus

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15
Q

The ______ of the CPU contains the ALU and Registers, and the interconnection between them.

A

Datapath

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16
Q

Which of the following best matches the definition of the Control Unit?

A

Coordinates the flow of information around the processor.

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17
Q

The ______ of the CPU stores a small number of pieces of information, commonly the temporary results of calculations.

A

Registers

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18
Q

Instruction cycle

A

fetch, decode, execute, store

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19
Q

Decode Hardware

A

Data Memory, control unit

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20
Q

Fetch Hardware

A

Instruction Memory, program counter

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21
Q

Execute Hardware

A

ALU

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22
Q

Store Hardware

A

Data Memory, program counter

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23
Q

System Clock

A

Coordinates Activity, latches memory

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24
Q

Select the hardware that is active during the Execute Stage of the instruction cycle:

A

ALU

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25
Q

Which of the following are stages in the instruction cycle?

A

Execute, decode, fetch, store

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26
Q

Which of the following are NOT stages in the instruction cycle?

A

Link, jump

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27
Q

A program consisting of 323 instructions is executing on a simple processor. Each instruction takes 4 cycles to complete, with a clock rate of 339 KHz. How long will it take to execute the program? Give your answer in units of milliseconds with at least 1 decimal place of precision.

A

3.8

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28
Q

Select the hardware that is active during the Store stage of the instruction cycle:

A

Data Memory, program counter

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29
Q

Select the hardware that is active during the Fetch Stage of the instruction cycle:

A

Program Counter, instructon memory

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30
Q

A program consisting of 946 instructions is executing on a simple processor. Each instruction takes 2 cycles to complete, with a clock rate of 6 MHz. How long will it take to execute the program? Give your answer in units of microseconds with at least 1 decimal place of precision

A

315.3

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31
Q

clock frequency

A

f = 1/T (1Hz = 1 cycle per second)

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32
Q

Speed

A

1 Program Execution / Time

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33
Q

X is n times faster than Y

A

SpeedX / SpeedY = n; TimeY/TimeX = n

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34
Q

Pareto Principle

A

80% of results generated by 20% of code

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35
Q

What design effort can improve the performance of a computer?

A

Decrease the clock cycles used by the program, Decrease the CPI

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36
Q

In comparing two computers, we execute a benchmark on each and measure the resulting speeds: Computer A: 733. Computer B: 979 How many times faster is Computer A than Computer B?

A

0.7

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37
Q

Which of the follow best matches this definition: The total number of instructions in a given program.

A

Instruction Count

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38
Q

Which of the follow best matches this definition: The duration of one clock cycle in seconds.

A

Clock Period

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39
Q

Which of the follow best matches this definition: The frequency of the clock signal, in cycles per second.

A

Clock Rate

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40
Q

In comparing two computers, we execute a benchmark on each and measure the resulting execution times:Computer A: 85, Computer B: 243. How many times faster is Computer B than Computer A?

A

0.3

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41
Q

the time taken for an electrical signal to travel through a wire or logic system

A

propagation delay

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42
Q

A designer chooses to use a cheaper polymer for packaging that decreases the transfer of heat to a heat sink. All else being constant, will the performance likely increase, decrease, or stay the same?

A

Decrease

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43
Q

Select the items below that a designer can modify to effect propagation delay (select all that apply).

A

Manufacturing Process, Processor Organization

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44
Q

A designer chooses to use a manufacturing process that decreases the feature size on the processor. All else being constant, will the performance likely increase, decrease, or stay the same?

A

Increase

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45
Q

A designer chooses to use an organization that increases the logic depth of the processor. All else being constant, will the performance likely increase, decrease, or stay the same?

A

Decrease

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46
Q

A designer chooses to use an organization that decreases the logic depth of the processor. All else being constant, will the performance likely increase, decrease, or stay the same?

A

Increase

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47
Q

A designer chooses to use a manufacturing process that increases the feature size on the processor. All else being constant, will the performance likely increase, decrease, or stay the same?

A

Decrease

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48
Q

How many symbols are used in the binary number system?

A

2

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49
Q

How many symbols are used in the decimal number system?

A

10

50
Q

A binary “0” is represented by what physical phenomena in a modern computer?

A

Low Voltage

51
Q

A binary “1” is represented by what physical phenomena in a modern computer?

A

High Voltage

52
Q

What indicates a negative number in the two’s complement representation?

A

The most significant bit is 1

53
Q

A variable of type signed short stores a value of -32768, If the variable value is decremented what exception will occur?

A

Underflow.

54
Q

A variable of type unsigned char stores a value of zero. If the variable value is decremented, what exception will occur?

A

Underflow.

55
Q

A variable of type signed int stores a value of -2147483648, If the variable value is decremented what exception will occur?

A

Underflow.

56
Q

A variable of type signed short stores a value of 32767. If the variable value is incremented what exception will occur?

A

Overflow.

57
Q

Which of the following are causes of overflow?

A

Adding to a variable when its value is at the upper end of the datatype range.

58
Q

A variable of type unsigned short stores a value of zero. If the variable value is decremented, what exception will occur?

A

Underflow.

59
Q

A variable of type unsigned short stores a value of 32767. If the variable value is decremented, what exception will occur?

A

No exception.

60
Q

A variable of type unsigned int stores a value of 4,294,967,295 If the variable value is decremented what exception will occur?

A

No exception.

61
Q

Which of the following are causes of underflow?

A

Subtracting from a variable when its value is at the lower end of the datatype range.

62
Q

A variable of type unsigned int stores a value of zero. If the variable value is decremented, what exception will occur?

A

Underflow.

63
Q

In which of the following situations will endianness become an issue?

A

Transferring a memory block from a Little-Endian processor to a Big-Endian processor.Transferring a memory block from a Big-Endian processor to a Little-Endian processor.

64
Q

Select the definition of big-endian

A

The most significant byte of a multi-byte datatype is stored at a lower address than the least significant byte.

65
Q

Select the definition of little-endian.

A

The least significant bit of a single byte datatype is stored at a lower address than the most significant bit.

66
Q

What register stores a return value of a procedure?

A

$v0

67
Q

What register stores a temporary value that the caller procedure must save before calling a nested procedure?

A

$t0

68
Q

What register stores a parameter value of a procedure?

A

$a0

69
Q

What are the main reasons for writing procedures in assembly programs? Select all that apply.

A

Easier to reuse the code. Easier to understand and to debug

70
Q

What register stores the return address of a procedure?

A

$ra

71
Q

What register stores a temporary value that the callee procedure must save before performing it’s task?

A

$s0

72
Q

What register does the “jal” instruction automatically update?

A

$ra

73
Q

In a procedure call, what is responsible for saving the $s0 - $s7 registers?

A

Callee Procedure

74
Q

In a procedure call, what is responsible for saving the $t0 - $t9 registers?

A

Caller Procedure

75
Q

In MIPS, the stack pointer is manipulated using the instruction addiu $sp, $sp, XX where “XX” is a number that may be positive or negative. If we need to reserve enough room on the stack for 8 integers in addition to the $ra register, what is the value of XX?

A

-36

76
Q

A procedure does not call another procedure. How does it differ from a procedure that does call another procedure?

A

Register $ra does not need to be saved to stack

77
Q

In a procedure call, the $a0-$a3 registers are used for what purpose?

A

Passing Parameters

78
Q

A set of registers are reserved for procedure calls. How do we preserve all values when a procedure calls another procedure?

A

Use stack memory

79
Q

When we write the instruction “addi $sp, $sp, -8”, most likely we are preparing for:

A

Saving registers to stack

80
Q

In a procedure call, the $ra register is used for what purpose?

A

Storing the return address

81
Q

When we write the instruction “addi $sp, $sp, 8”, most likely we are preparing for:

A

Executing instruction jr $ra

82
Q

Given a pipelined processor with 3 stages, what is the theoretical maximum speedup of the the pipelined design over a corresponding single-cycle design?

A

3

83
Q

Which of the following are true about single cycle vs. pipelined processor designs? (Select all that apply).

A

In a pipelined design, the processor components are fully utilized, but by different instructions. In a single cycle design, a single instruction is executing in the processor during any single clock cycle.

84
Q

Pipelined processor designs increase performance, but at the cost of:

A

Increased processor design complexity.

85
Q

Which of the following must be added to a single-cycle processor in order to implement a pipelined design? (Select all that apply)

A

Pipeline Registers, Modified Registers for simultaneous read/write. Hazard Detection & Mitigation Hardware

86
Q

Pipeline registers store (select all that apply):

A

Control signals related to the instruction The results of pipeline stage execution. Instruction data necessary for the execution of later stages.

87
Q

What is the maximum speedup (upper limit) of an N-stage pipelined processor?

A

N

88
Q

Given a pipelined processor with 3 stages, what is the theoretical maximum speedup of the the pipelined design over a corresponding single-cycle design?

A

3

89
Q

Where do we save the control signals for different instructions in a pipelined datapath?

A

In pipeline registers between the stages.

90
Q

A load instruction can cause a stall, because:

A

The memory read operation takes too long

91
Q

Forwarding (bypassing) alone can completely avoid stall (bubble) caused by: (select all that apply)

A

Arithmetic Instructions

92
Q

What MIPS instruction will always cause a stall if the next instruction uses its result?

A

LW

93
Q

What types of hazards does a pipelined processor need to deal with specifically? Select all that apply.

A

Structure Hazards, Control Hazards, Data hazards

94
Q

What is an advantage of static branch prediction? (Select all that apply)

A

Simple implementation.

95
Q

Which of the following describes 2-bit history table branch prediction?

A

A history table is used to store multiple bits, mapped to the branch instruction address, indicating the history of the branch behavior. A state machine is used to update the table.

96
Q

What is a disadvantage of a dynamic branch prediction method, like history table?

A

Increases hardware complexity.

97
Q

What is an advantage of a dynamic branch prediction method, like history table?

A

Increased performance. High branch prediction accuracy (better than chance)

98
Q

Which of the following describes 1-bit history table branch prediction?

A

A history table is used to store a single bit mapped to the branch instruction address, indicating that the branch was previously taken or untaken.

99
Q

Which of the following describes static branch prediction?

A

Hardware designer specifies to always predict a taken or untaken branch.

100
Q

In the memory hierarchy design, what type of memory should be placed close to the CPU?

A

SRAM

101
Q

Which of the following types of memory is the slowest?

A

Disk

102
Q

Which of the following types of memory are generally used for the intermediate results of calculations?

A

SRAM

103
Q

Large-scale, long term storage is typically implemented with what kind of memory technology?

A

Disk

104
Q

You are designing an internet router that will need to save it’s settings between reboots. Which type of memory should be used to save these settings?

A

Flash

105
Q

Which of the following types of memory are volatile?

A

DRAM, SRAM

106
Q

Which of the following types of memory is the most expensive?

A

SRAM

107
Q

Caches are typically implemented with what kind of memory technology?

A

SRAM

108
Q

Registers are typically implemented with what kind of memory technology?

A

SRAM

109
Q

A level 1 cache is focused on supporting what kind of locality?

A

Temporal Locality

110
Q

An element in an array is accessed in memory. The pre-loading of other data in that array is an example of what kind of locality?

A

Spatial Locality

111
Q

The pre-loading of instructions into a cache that follow the instruction currently being executed is an example of what kind of locality?

A

Spatial Locality

112
Q

The instructions that make up a loop that iterates more than once are kept in a cache. This is an example of what kind of locality?

A

Temporal Locality

113
Q

In a multilevel cache system, the level-2 cache focuses on

A

Low miss rate

114
Q

What types of locality are used in memory design? Select all that apply.

A

Spatial locality, temporal locality

115
Q

A variable that has been accessed more than once is kept in cache. This is an example of what kind of locality?

A

Temporal Locality

116
Q

A level 2 cache is focused on supporting what kind of locality?

A

Spatial Locality

117
Q

Which of the following products are an example of the SIMD architecture?

A

Basic Graphics Processing Unit

118
Q

What is the name for an architecture that executes one instruction on one set of data at a time?

A

SISD

119
Q

What is the name for an architecture that executes several instructions, operating on different sets of data at a time?

A

MIMD

120
Q

Which of the following products are an example of the MIMD architecture?

A

Intel Xeon Processor

121
Q

Which of the following products are an example of the SISD architecture?

A

Intel Pentium Processor

122
Q

Which of the following are reasons that CPU designers have adopted multiprocessing architectures?

A

Manage heat dissipation problems. Processing demand to solve complex problems

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