1.1.1 Structure of the processor

Question 1

ALU

Answer 1

Arithmetic Logic Unit: “The part of the CPU where data is processed and manipulated. This processing and manipulation normally consists of arithmetic operations or logical comparisons allowing a program to make decisions.”

Question 2

Control Unit

Answer 2

“The part of the CPU that manages the execution of instructions. The control unit fetches each instruction in sequence, and decodes and synchronises it before executing it by sending control signals to other parts of the computer.”

Question 3

Register

Answer 3

“Tiny areas of extremely fast memory located in the CPU normally designed for a specific purpose, where data or control information is stored temporarily.”

Question 4

PC

Answer 4

Program Counter: “A register in the control unit which holds the address of the next instruction to be executed.”

Question 5

ACC

Answer 5

Accumulator: “A special register within the ALU. It is used to hold the data currently being processed by the central processor. Any data to be processed is stored temporarily in the accumulator, the results ending up back in the accumulator being stored in the memory unit.”

Question 6

MAR

Answer 6

Memory Address Register: “A register in the CPU that stores the address of the memory location currently in use. In the fetch phase, this would be the address of the instruction being loaded; in the execute phase, it would be the address of the data being used.”

Question 7

MDR

Answer 7

Memory Data Register: “A register in the CPU that stores data being transferred to and from the immediate-access store. It acts as a buffer, allowing the central processor and memory unit to act independently without being affected by minor differences in operation. A data item will be copied to the MDR ready for use at the next clock pulse, when it can either be used by the central processor or be stored in main memory.”

Question 8

CIR

Answer 8

Current Instruction Register: “A register in the control unit that stores the address of the next instruction currently being executed and decoded.”

Question 9

Busses

Answer 9

“A common physical pathway shared by signals to and from several components of a computer.”

Question 10

Data Bus

Answer 10

“The part of the bus which carries the actual information.”

Question 11

Address Bus

Answer 11

“The part of the bus which carries identification about where the data is being sent.”

Question 12

Control Bus

Answer 12

“This bus carries command and control signals to and from every other component of a computer.”

Question 13

Fetch-Decode-Execute

Answer 13

“The complete process of retrieving an instruction from store, decoding it and carrying it out. Also known as the instruction cycle.”

Question 14

CPU

Answer 14

Central Processing Unit: “The main part of the computer, consisting of the registers, ALU and control unit.”

Question 15

Clock Speed

Answer 15

“Measured in Hertz, the clock speed is the frequency at which the internal clock generates pulses. The higher the clock rate, the faster the computer may work. The “clock” is the electronic unit that synchronises related components by generating pulses at a constant rate.”

Question 16

Cores

Answer 16

“A part of a multi-core processor. A multi-core processor is a single component with two or more independent actual CPUs, which are the units responsibly for the fetch-decode-execute cycle.”

Question 17

Cache

Answer 17

“A part of the main store between the central processor and the rest of the memory. It has extremely fast access, so sections of a program and its associated data are copied there to take advantage of its short fetch cycle.”

Question 18

Pipelining

Answer 18

“The concurrent decoding of two or more machine instructions. While part of one instruction (for example, an address field) is being decoded, another part of a second instructions (for example, an operation code) may also be decoded.”

Question 19

Von Neumann Architecture

Answer 19

“Traditional computer architecture that forms the basis of most digital computer systems. A single control unit manages program control flow following a linear sequence of “fetch-decode-execute””

Question 20

Harvard Architecture

Answer 20

“A computer architecture with physically separate storage and signal pathways for instructions and data. These early machines had data storage entirely contained within the central processing unit, and provided no access to the instruction storage as data.”

Question 21

Contemporary Architecture

Answer 21

“Any modern set of disciplines that describes the functionality, the organisation and the implementation of computer systems.”