1.1.1 // Structure & Function of the Processor: Components of the CPU & The FDE Cycle Flashcards
Important Parts of the CPU, how it interacts with RAM, Registers, and Busses.
What is the purpose of the Control Unit (CU)?
The CU coordinates when/where each component should function. By sending signals along the Control Bus, it ensures smooth and accurate execution of programs.
(Coordinates and communicates with all parts of the CPU.)
How does the Control Unit (CU) use the Control Bus for Read/Write Requests?
What does it do during the FDE Cycle?
- Memory Read: The CU sends a Memory Read signal on the Control Bus. This tells the memory to send data over the Data Bus back to the CPU.
- Memory Write: The CU sends a Memory Write signal on the Control Bus. This prompts memory to accept data from the data bus and store it in a specific memory location identified by the Address Bus.
(It’s also connected to every part of the CPU, maintaining smooth flow.)
How does the Control Unit (CU) use the Control Bus for Bus Requests and Grants?
- When different parts of the system (like memory, I/O devices, or DMA controllers) need to use the CPU’s resources, they may request access to the buses (like the data bus) to transfer information.
- The CU controls Bus Requests (when a device asks to use the bus) and Bus Grants (when the CU gives permission to use it).
This helps prevent conflicts, ensuring only one component is accessing a bus at a time.
How does the Control Unit (CU) use the Control Bus for Interrupt Handling?
- When an external device needs urgent attention from the CPU (e.g., a keyboard input), it sends an interrupt signal via the Control Bus.
- The CU handles this by pausing the current task, saving the CPU’s state, and executing the interrupt service routine. Once done, it restores the CPU state and resumes the original task.
How does the Control Unit (CU) use the Control Bus for coordinating Timing and Sequencing?
- The CU is responsible for keeping all CPU operations in sync with the system clock. It sends timing signals that synchronize fetching, decoding, and execution of instructions.
- For example, the CU ensures that an instruction is not executed before it is fully fetched and decoded, or that data is not written before a memory address is properly set.
What is the purpose of the Program Counter (PC)?
The Program Counter is a register that holds the address of the next instruction to be processed by the CPU.
(By holding the address, it metaphorically ‘points’ to the instruction.)
What is the function of the Program Counter (PC)?
What does it do during the FDE Cycle?
An address held in the PC could be one in a series of addresses.
However, if the current instruction was one commanded to jump or branch, the PC would be updated to hold the address of the target jump/branch, simultaneously affecting the sequence of addresses the PC would normally queue/increment.
The PC also has a close relationship with the MAR, and at the start of every FDE cycle, the CU copies it’s held address into the MAR.
What is the purpose of the Memory Address Register (MAR)?
The MAR holds the addresses of:
- Instructions to be fetched
- Locations where data is to be written to/read from.
These addresses are sent to the main memory for location and retrieval along the Address Bus.
What is the function of the Memory Address Register (MAR)?
What does it do during the FDE Cycle?
It sends the held address along the Address Bus to the main memory, which either locates and retrieves data/instructions from memory, or writes data to the memory location.
If retrieving, the data is sent along the Data Bus to the MDR or IR (Depending on the CPU Architecture).
What is the purpose of the Memory Data Register (MDR)?
Temporarily stores data that was either:
- Sent from the CIR to then send along the Data Bus to memory for writing to a location (a Write operation)
- Recieved data that the main memory sent it along the Data Bus after retrieval. (a Read operation)
It ensures that the correct data is fetched or written from/to memory.
(Acts as an intermediary between the CIR and the Data Bus.)
What is the function of the Memory Data Register (MDR)?
What does it do during the FDE Cycle?
If the CPU needs to write data to a location in memory, General-Purpose Registers load the data into the MDR, simultaneously loading the desired address into the MAR. After sending along their respective busses to Main Memory, the data is written to the address.
If the CPU needs to read data from a location in memory, a GPR will load the address into the MAR, which is then sent along the Address Bus, located and retrieved by Main Memory, and the data sent back to the MDR along the Data Bus.
(All data to and from memory must pass along the Data Bus to the MDR.)
What is the purpose of the Current Instruction Register (CIR)?
Acts as a temporary storage location for the current instruction that is being decoded and executed.
What is the function of the Current Instruction Register (CIR)?
What does it do during the FDE Cycle?
The CIR temporarily holds the instruction copied from the MDR. The CU decodes this instruction into an opcode and operands, then delegates tasks to appropriate registers or components for execution.
After the instruction is processed, the CIR is updated with the next instruction.
(Despite recieving instructions from the MDR, CIR does not read/write.)
What are Instructions, and what do they consist of?
Instructions are commands that tell the CPU what operation to perform. They are made up of 2 components:
- Opcode (Operation Code): Specifies the operation to be performed; like Addition, Subtraction, Data Movement, etc.
- Operand(s): Specifies the data/memory locations the operation will act upon; They can be:
– Immediate Values (Constants directly specified in the Instruction.)
– Memory Addresses (Location in memory where data is stored.)
– Registers (Storage locations within the CPU where data can be held.)
What is the purpose of the Arithmetic Logic Unit (ALU)?
To perform all the fundamental mathematical and logical operations required by a computer to process data and execute instructions.
