1.1.1 Structure and Function of the Processor

Question 1

What does the arithmetic and logic unit do?

Answer 1

completes all arithmetic and logic operations

Question 2

What is the control unit?

Answer 2

a part of the processor which coordinates operations inside the CPU, and flow between hardware

Question 3

What are registers?

Answer 3

small memory cells that operate at high speeds

Question 4

Where do all the arithmetic, logic or shift operations occur?

Answer 4

ALU

Question 5

What does the program counter (PC) do?

Answer 5

holds the address of the next instruction, incremented by 1 after every instruction

Question 6

In which part of the CPU do all calculations take place?

Answer 6

the arithmetic logic unit (ALU)

Question 7

Where are intermediate arithemtic and logic results stored?

Answer 7

accumulator

Question 8

What does the memory address register do?

Answer 8

holds the address of a location that is to be read from or written to

Question 9

What does the memory data register do?

Answer 9

temporarily stores data that has just been read from or data that needs to be written

Question 10

What does the current instruction register do?

Answer 10

holds the current instruction, divided up into opcode and operand

Question 11

What is a bus?

Answer 11

a set of parallel wires connecting two or more components together

Question 12

What is a system bus?

Answer 12

the collection of the data, address and control bus

Question 13

What is the width of a bus?

Answer 13

the number of parallel wires it has

Question 14

What is the data bus?

Answer 14

a bidirectional bus used to transport data and instructions between components

Question 15

What is the control bus?

Answer 15

a bi-direction bus used to transmit control signals betweeen internal and external components

Question 16

What is the address bus used for?

Answer 16

to transmit the memory address of words to the CPU, specifying where data is to be read from or written to, uni-directional

Question 17

What does adding a wire to the address bus do to the number of addressable locations?

Answer 17

it doubles the number of addressable locations

Question 18

What does the bus request indicate?

Answer 18

a device is requesting access to the data bus

Question 19

What does bus grant indicate?

Answer 19

the CPU has granted access to the bus

Question 20

What does memory write do?

Answer 20

causes the data on the data bus to be written into the addressed location

Question 21

What does memory read do?

Answer 21

causes the data from the addressed location to be placed onto the data bus

Question 22

What does the interrupt request control signal indicate?

Answer 22

a device is requesting access to the CPU

Question 23

What is the clock control signal used for?

Answer 23

to synchronise instructions

Question 24

What is assembly language?

Answer 24

a low-level programming language where mnemonics are used to represent instructions

Question 25

What is opcode used for?

Answer 25

to determine the type of instruction and what hardware to use to excecute it

Question 26

What is the operand?

Answer 26

the data or value that an operator acts upon or manipulates

Question 27

What occurs during the fetch stage? (4 things)

Answer 27

1. address from the program counter is copied to the memory address register 2. the instruction held at that address is copied to the memory data register 3. simultaneously the contents of the program counter is increased by 1 4. the value of the memory data register is copied to the current instruction register

Question 28

What occurs during the decode stage?

Answer 28

the decontents of the CIR is split into opcode and operand, happens in the decoder Addresses sent to MAR, Actual data to MDR or ALU/ACC

Question 29

What occurs during the excecute phase?

Answer 29

the opcode is executed on the data

Question 30

What is the clock speed?

Answer 30

the number of clock cycles completed per second

Question 31

What is cache memory?

Answer 31

the CPU's onboard memory which can be accessed a lot faster than main memory

Question 32

What is von neumann architecture?

Answer 32

architecture where there is a shared memory and data bus for both data and instructions

Question 33

What is harvard architecture?

Answer 33

architecture where there is a seperate memory and data buses for data and instructions

Question 34

What is contemporary processing? (2 things)

Answer 34

1. processing where von neumann architecture is used for main memory
2. cache uses harvard architecture, divided into instruction cache and data cache