1.1.1 Structure and Function of the Processor Key Terms Flashcards
Key terms and definitions
ALU
Arithmetic Logic Unit - the part of the CPU where data is processed and manipulated using arithmetic and logical operations
Control Unit
The part of the CPU that manages the FDE Cycle by signalling other parts of the processor and RAM
Decode Unit
The part of the CPU that interprets instructions
Register
Small areas of extremely fast memory located in the CPU designed for a specific purpose, where data or control information is stored temporarily
PC
Program Counter - Stores the address of next instruction to be fetched. Incremented every cycle but can be changed by branch commands
ACC
Accumulator - Used to hold data currently being processed. Stores user input, output from ALU and data retrieved from RAM.
MAR
Memory Address Register - Stores the address of the memory location to be accessed / currently being accessed. Loads Address onto the Address Bus
MDR
Memory Data Register - stores the information (data and instructions) retrieved from RAM, or output to RAM from ACC. Loads data onto and receives data from the Data Bus.
CIR
Current Instruction Register - stores the instruction currently being executed and decoded.
Busses
A physical path (set of wires) used to send signals between components.
Data Bus
Connection between the MDR and RAM, used to transmit data and instructions. Transmits data in both directions.
Address Bus
Connection between the MAR and RAM, used to transmit addresses. Transmits data in only one direction - MAR to RAM.
Control Bus
Connection between the Control Unit and RAM, used to transmit control signals such as read, write and ready instructions. Transmits data in both directions
FDE
Fetch - Decode - Execute. The Cycle by which the CPU retrieves instructions from RAM, decodes what the instruction is and then carries out those instructions.
CPU
Central Processing Unit - The main component of a computer, contains registers and units which execute instructions.
Clock
A device internal to the CPU which sends regularly timed pulses to the Control Unit, in order to manage the FDE Cycle.
Clock Speed
Measured in Hertz (Hz), pulses per second. Higher Clock speeds mean more instructions executed per second. Modern Processor speeds and measured in Gigahertz (GHz).
Cores
Discrete CPUs held on a single Processor Chip, which can operate by executing instructions in parallel to speed up processing of data.
Cache
A section of memory held within or very close to the CPU, used to store regularly used or soon to be accessed instructions. Very fast access speeds compared to RAM. More Cache means faster processing speeds.
Pipelining
Carrying out the steps of the FDE Cycle concurrently. As one instruction is being decoded, the previous instruction is being executed and the next instruction is being fetched. Branching causes the pipeline to be flushed.
Von Neumann Architecture
Single Control Unit manages FDE Cycle. Single set of Buses between CPU and RAM. Data and Instructions are stored in the same location and same format.
Harvard Architecture
Single Control Unit Manages the FDE Cycle. Two sets of buses used for carrying data and instructions. Data and Instructions stored in separate areas of Memory and in different formats.
Contemporary Architecture
Any modern set of disciplines that describes the functionality, the organisation and the implementation of computer systems.
