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computer science > 1.1.1 structure and function of processor > Flashcards

1.1.1 structure and function of processor Flashcards

architecture, fde, performance of cpu, pipelining, von neumann vs harvard

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1
Q

what is the role of the cpu?

A

processes data by executing program instructions

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2
Q

what is the role of the alu?

A

performing arithemetic calculations and logical operations

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3
Q

what are the specific operations that the alu is responsible for?

A

addition, subtraction, multiplication, division
logical operations
comparison between values
shifting binary patterns to left or right

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4
Q

what is the role of the cu?

A

controls and manages the execution of instructions, the sequence of operations, directs the flow of data with control signals, decodes every instruction that the cpu will execute

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5
Q

what is the role of the clock?

A

generating regular clock pulses by emitting a signal that is used to synchronise the operations of the processor components

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6
Q

how do clock pulses work?

A

the clock generates regular clock pulses by emitting a signal that continuously oscillates between a low (0) and a high (1) state

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7
Q

what is a clock period?

A

the time taken between 2 sequential rising edges of a signal state (it corresponds to one clock cycle)

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8
Q

what is a rising edge?

A

a change from a low (0) state to a high (1) state of clock signals

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9
Q

what is a falling state?

A

a change from a high (1) state to a low (0) state of clock signals

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10
Q

what is clock rate / clock freq / clock speed?

A

number of clock cycles that can be completed in 1 second (measured in Hz) it is the inverse of the clock period

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11
Q

what is a register?

A

locations of computer memory within the processor that provide extremely fast access

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12
Q

what is a general-purpose register?

A

a register to temporarily store and access the results of operations

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13
Q

what is a special-purpose register?

A

processor-based registers that are used for a specific purpose

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14
Q

what is the role of the pc?

A

holds the address of the next instruction to be executed by the processor

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15
Q

what is the role of the cir?

A

holds the current instruction that the cpu is executing

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16
Q

what is the role of the status register (sr)?

A

used to store information about the result of the last instruction that the alu executed

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17
Q

how does the sr work?

A

each bit within the status register acts as a flag to indicate if an error or exception has occurred within the process or to enable or disable interrupts to be raised

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18
Q

what is an interrupt?

A

an event outside the program process that requires the attention of the cpu

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19
Q

what is the role of the mar?

A

temporarily hold the address of the memory location that the cpu needs to access, either to read from or to write to

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20
Q

what is the role of the mdr / mbr?

A

temporarily holds the data that are read from or written to main memory

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21
Q

what is the role of the acc?

A

stores the result of any calculation processed by the alu

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22
Q

what is the difference between general-purpose registers and the acc?

A

the acc holds any RESULT, the general purpose holds them temporarily while calculations are in the process of being completed

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23
Q

what has to happen before the fde cycle can take place?

A

the program instructions need to be in machine code and the program instructions have been loaded into RAM

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24
Q

what happens at the end of the fde?

A

the cpu checks the status register to see if an error, exception or interrupt needs to be handled

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25
Q

what is an exception?

A

an unexpected behaviour that occurs during execution

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26
Q

what are all components connected to?

A

the cu

27
Q

what happens in the fetch stage?

A
  1. the contents of the pc are copied into the mar
  2. the address of the next instruction to be executed is placed on the address bus
  3. the cu instructs a memory read operation to allow the contents of the memory location to be transferred into the cpu
  4. the instruction that is stored at that address is transferred using the data bus from ram to cpu and is saved in the mdr
  5. simultaneously the pc is incremented by 1
  6. the contents of the mdr are copied into the cir
28
Q

what happens in the decode stage?

A
  1. the cu decodes the instruction that is kept in the cir
    this involves splitting the instruction into operand and opcode
29
Q

what happens in the execute stage?

A
  1. the instruction is executed (the sequence of operations depends on the type of instruction being executed.
30
Q

generally what is the impact of clock speed on the cpu?

A

greater the clock speed, the faster instructions are carried out

31
Q

how many state changes per second can a cpu with clock speed 3.6GHz complete theoretically?

A

3.6 billion

32
Q

how many clock cycles does a single instruction take?

A

typically more than 1

33
Q

what is overclocking?

A

making a cpu perform more instructions per second than recommended by the manufacturer

34
Q

what is the consequence of overclocking?

A

could cause the cpu to overheat

35
Q

what does multicore mean?

A

the computer has more than one processing unit / core

36
Q

generally what is the impact of cores on the cpu?

A

the more cores, the more instructions it can execute at the same time

37
Q

what is parallel processing?

A

dividing a computation into subtasks so they can be processed in parallel by each core simultaneously

38
Q

why does parallel processing speed up the process?

A

if the instruction can’t be split, then the system would have to queue the parts of an instruction being fed into a particular core, slowing completion

39
Q

what is the impact of having a process with a strictly-enforced sequence?

A

it may not be possible to run it in parallel until the queued processes have been completed

40
Q

what is the role of cache?

A

used to store the instructions and data which are most frequently used

41
Q

what is cache?

A

a fast and relatively small capacity set of locations that sit close to the processor

42
Q

why is cache used?

A

when an instruction (or set of) is frequently used during an operation, it is costly for a cpu to fetch them from ram over and over again

43
Q

which is more expensive: cache or ram?

A

cache! it also cannot be easily upgraded or replaced

44
Q

how many levels do most computer systems have of cache?

A

3 (some now have 4)

45
Q

what is level 1 cache?

A

part of the circuitry of each core, smallest and fastest

46
Q

what is level 2 cache?

A

shared by cores, part of the core in the same way as l1, slower and larger than l1

47
Q

what is level 3 cache?

A

on / near the cpu on the motherboard, slower and larger than l2

48
Q

what is level 4 cache?

A

roughly same place as l3, in newer systems

49
Q

generally what is the impact of more cache?

A

larger the cache, more instructions that can be queued and carried out

50
Q

why is the placement of cache important?

A

having on the circuitry of each core reduces the time it takes for instructions/data to pass through the registers

51
Q

generally what is the impact of having more number of cache levels?

A

greater number of cache levels, the more efficient the system - inc in speed and memory means that more data is held nearer to the cpu

52
Q

what is pipelining used for?

A

improving cpu performance

53
Q

what needs to occur to apply pipelining on a task?

A

task needs to be broken down into subtasks that can be handled independently

54
Q

how is pipelining used in the fde cycle?

A

1 is being fetched
2 is being fetched 1 is being decoded
3 is being fetched 2 is being decoded 1 is being executed

55
Q

how does the fde cycle avoid overwriting data whilst pipelining?

A

they have distinct stages which are repeated for each instruction, between each stage there are registers keeping immediate results and a clock signal that synchronises flow

56
Q

where is von neumann architecture used?

A

many modern-day computer systems

57
Q

what does the von neumann architecture consist of?

A

cpu
memory unit that can communicate directly with the cpu
connections for input/output devices
secondary storage

58
Q

how is data transferred between the memory and cpu in von neumann architecture?

A

the same address/data bus

59
Q

where is harvard architecture used?

A

dsp systems, embedded systems

60
Q

how is harvard architecture different to von neumann architecture?

A

harvard keeps instructions/data in separate memories

61
Q

how is data transferred between the memory and cpu in harvard architecture?

A

separate data and address buses - cpu is connected to the instruction memory using a dedicated set of address and data buses, and is connected to the data memory using a different set of address and data buses

62
Q

what does harvard architecture consist of?

A

cpu
data memory
instruction memory
connections for input/output devices
secondary storage

63
Q

what are the advantages of harvard?

A

separate memory units/data so they can be accessed simultaneously, minimising the issue of keeping the cpu waiting (increasing cpu performance)

instruction/data memories can be different sizes, word lengths and can be implemented using a different type of technology so each memory can be adapted to meet the needs of a particular system

instruction memory can be implemented as rom protected the programs from changes by hacking

64
Q

what are the advantages of von neumann?

A

less physical space is required

cheaper to use

has a more flexible use of the main memory, which allows the cpu to run a variety of programs that aren’t known in advance

computer science (6 decks)

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