1.1.1 Structure and function of processor

Question 1

ALU

Answer 1

The arithmetic logic unit carries out the arithmetic and logic operations

Question 2

The control unit

Answer 2

it is a processor which coordinates the operations of the cpu, this includes managing the flow of data between the cpu and other devices, decoding instructions etc

Question 3

what are registers

Answer 3

registers are small memory cells that operate at a very high speed. They are used to temporarily store data and all arithmetic, logical and shift operations occur in these registers.

Question 4

program counter (pc)

Answer 4

holds the address of the next instructions to be executed.

Question 5

Accumulator ( ACC )

Answer 5

stores the results from calculations

Question 6

Memory address register ( MAR )

Answer 6

holds the address of the location that is to be read from or written to

Question 7

memory data register (MDR)

Answer 7

temporarily stores data that has been read from or data that needs to be written

Question 8

Current instruction register ( CIR )

Answer 8

Holds the current instruction being executed, divided up into operand and opcode

Question 9

Data bus

Answer 9

This is a bi-directional bus used for transporting data and instructions between components

Question 10

Address bus

Answer 10

transmits memory address of data to be sent to or retrieved from. The width of the address bus is proportional to the number of addressable memory locations

Question 11

Control bus

Answer 11

a bi-directional bus used to transmit control signals between internal and external components

Question 12

Assembly code

Answer 12

this is a simplified way of representing machine code, it uses mnemonics to represent instructions, for example ADD represents addition

Question 13

operand

Answer 13

this contains the data or the address of the data which the operation is to be performed on

Question 14

opcode

Answer 14

this specifies the type of instruction to be executed

Question 15

The fetch-Decode-Execute cycle

Answer 15

The fetch-decode-execute cycle is the sequence of operations that are completed in order to executed an instruction

Question 16

Fetch

Answer 16

• address from the pc is copied to the MAR
• Instructions held at that address is copied to MDR via the data bus
• At the same time, the contents of the PC are increased by 1
• The value held in the MDR is copied to the CIR

Question 17

Decode

Answer 17

• The contents of the CIR are slit into operand and opcode

- It is the Decoded by the control unit

Question 18

Execute

Answer 18

• The decoded instruction is then carried out

Question 19

Factors affecting CPU performance

Answer 19

• Clock speed
• Number of cores
• Cache size and type

Question 20

How does clock speed affect CPU performance

Answer 20

The higher the clock speed the more instructions that can be executed per second

Question 21

how does the number of cores affect cpu performance

Answer 21

A computer with multiple cores can complete more than one FDE cycle at at any given time. a dual core processor could complete tasks twice as fast as a single core one. However, not all programs are able to utilise multiple cores efficiently

Question 22

how does cache size affect CPU performance

Answer 22

more information can be stored on the CPU’s onboard memory therefore more instructions can be accessed quicker

Question 23

Level 1 cache

Answer 23

-Very fast memory cells with a small capacity. (2-64KB)

Question 24

Level 2 Cache

Answer 24

Relatively fast memory cell, with medium sized capacity. (256KB-2MB)

Question 25

Level 3 Cache

Answer 25

Much larger and slower memory cell

Question 26

Von Neumann architecture

Answer 26

• Has a single control unit and a single ALU
• Works sequentially through instructions
• Stores instructions and data together in the same memory unit

Question 27

Harvard architecture

Answer 27

• It has physically separate memories for instructions and data, more commonly used with embedded processors.
• each memory has its own set of buses

Question 28

Advantages of von Neumann architecture

Answer 28

• Cheaper to develop as the control unit is easier to design
• Programs can be optimised in size

Question 29

Advantages of Harvard architecture

Answer 29

• Quicker execution as data and instructions can be fetched in parallel.
• Memories can be different sizes, which can make more efficient use of space

Question 30

Contemporary processing

Answer 30

• This makes use of parallel processing- processing more than one piece of data at the same time.