1.1.1 Structure And Function Of A Processor

Question 1

What does the Arithmetic and Logic unit do?

Answer 1

The ALU completes all the arithmetic and logical operations

Question 2

What is the Control Unit?

Answer 2

A part of the processor which directs operations inside the CPU

Question 3

What are registers?

Answer 3

Small memory cells that operate at high speeds

Question 4

Where do all the arithmetic, logic, or shift operations occur?

Answer 4

They occur in registers

Question 5

What does the Program Counter (PC) do?

Answer 5

The PC holds the address of the next instruction to executed

Question 6

In which part of the CPU do all the calculations take place?

Answer 6

Arithmetic and Logic Unit (ALU)

Question 7

Where are the intermediate arithmetic and logic results stored

Answer 7

In the Accumulator (ACC)

Question 8

What does the Memory Address Register (MAR) do?

Answer 8

Holds the address of a location that is to be read from or written to

Question 9

What does the Memory Data Register (MDR) do?

Answer 9

Temporarily stores the data that has just been read from or the data that needs to be written to memory

Question 10

What does the Current Instruction Register (CIR) do?

Answer 10

Holds the current instruction, the instruction is divided up into opcode and operand

Question 11

What is a bus?

Answer 11

A set of parallel wires connecting two or more components together

Question 12

What is a system bus?

Answer 12

The collection of the data bus, address bus, and control bus is called the system bus

Question 13

What is the width of a bus?

Answer 13

The number of parallel wires it has

Question 14

What is the data bus?

Answer 14

A bi-directional bus used to transport data and instructions between components

Question 15

What is the control bus?

Answer 15

The bi-directional bus used to transmit control signals between internal and external components

Question 16

What is the address bus?

Answer 16

Used to transmit the memory address specifying where data is to be sent from or retrieved from

Question 17

What does adding a wire to the address bus do to
the number of addressable locations?

Answer 17

It doubles the number of addressable
locations

Question 18

What does Bus Request indicate?

Answer 18

It indicates a device is requesting access
to the data bus.

Question 19

What does Bus Grant indicate?

Answer 19

What does Bus Grant indicate?
Indicates the CPU has granted access to
the data bus

Question 20

What does memory write do?

Answer 20

Causes the data on the data bus to be
written into the addressed location

Question 21

What does memory read do?

Answer 21

Causes the data from the addressed
location to be placed onto the data bus.

Question 22

What does the interrupt request control signal
indicate?

Answer 22

Indicates that a device is requesting
access to the CPU.

Question 23

What is the clock control signal used for?

Answer 23

It is used to synchronise instructions.

Question 24

What is Assembly Language?

Answer 24

Assembly Language is a programming
language where mnemonics are used to
represent instructions.

Question 25

What is opcode?

Answer 25

Opcode is used to determine the type of instruction and what hardware to use to execute it.

Question 26

What is the operand?

Answer 26

The operand is the address of where the operation is performed.

Question 27

What occurs during the fetch phase?

Answer 27

- The address from the PC is copied to the MAR, - Instruction held at that address is copied to the MDR by the data bus, simultaneously the contents of the PC is increased by 1, - The value of the MDR is copied to the CIR

Question 28

What occurs during the decode phase?

Answer 28

The contents of the CIR is split into operand and opcode.

Question 29

What occurs during the execute phase?

Answer 29

The opcode is executed on the data.

Question 30

What is the clock speed?

Answer 30

The number of clock cycles completed per second.

Question 31

What is cache memory?

Answer 31

Cache memory is the CPU’s onboard memory which can be accessed a lot faster than main memory

Question 32

What is pipelining?

Answer 32

The process of completing the fetch, decode and execute of three separate files simultaneously.

Question 33

What is Von Neumann architecture?

Answer 33

Architecture in which there is a single shared memory and shared data bus for both data and instructions.

Question 34

What is Harvard architecture?

Answer 34

Architecture in which there is two separate memory and data buses for data and instructions.

Question 35

What is contemporary processing?

Answer 35

Processing in which Von Neumann architecture is used for main memory. Cache uses Harvard architecture, divided into instruction cache and data cache