1.1.1 Flashcards
Characteristics of contemporary processors, input, output and storage devices.
1
Q
What is the role of the control unit?
A
- Decodes instructions
- Sends and receives control signals from other components.
- Ensures the execution of instructions in the correct sequence.
- Receives a signal from the clock that is used to synchronise operations.
- Connected to all components.
2
Q
What is the role of the ALU?
A
- Arithmetic and logical bitwise operations.
- Comparisons and binary shifting.
3
Q
What is the role of the program counter?
A
- Holds the address of the next instruction to be executed.
4
Q
What is a register?
A
- A location of very high speed memory within the processor.
5
Q
What is the role of the CIR?
A
- Holds the instruction that the processor is currently executing
6
Q
What is the role of the MAR?
A
- Holds the address of the memory location that the processor needs to access.
7
Q
What is the role of the MDR/MBR?
A
- Holds the data that are read from or written to main memory.
8
Q
What is the role of the accumulator?
A
- Stores the result of any calculation processed by the ALU.
9
Q
What is the data bus?
A
- Bidirectional bus used for sending data .
10
Q
What is the address bus?
A
- Unidirectional bus used for sending memory addresses.
11
Q
What is the control bus?
A
- Unidirectional bus used for sending control signals.
12
Q
What is the role of the clock?
A
- Maintains the synchronisation of the components.
- Keeps track of current date and time.
13
Q
What is the cache and its role?
A
- A type of volatile memory that stores small amounts of frequently used data and instructions.
- Reduces amount of time taken to fetch data as it is faster to access and it is closer to the CPU.
14
Q
What happens in the fetch stage?
A
- Address stored in PC is copied to MAR (AB).
- PC increments to the address of the next instruction (AB).
- Control unit instructs a memory read to allow the contents of the memory location to be transferred to the MDR (DB).
- Instruction in the MDR is copied to the CIR in order to free the MDR for the execute stage (DB).
15
Q
What happens in the decode stage?
A
- Control unit decodes the instruction kept in the CIR.
- Splits the instruction into operand and opcode to determine the type of instruction.
- Control unit generates specific control signals based on decoded instruction.
16
Q
What happens in the execute stage?
A
- Instruction is executed by the ALU.
- Result is either stored in the accumulator, buffer register or main memory.
17
Q
What is a core and what is its affect on CPU performance?
A
- A core a single complete processing unit that can execute.
- Generally more cores = more instructions / cycle.
- However only applications designed for parallel processing can take advantage of multiple cores.
- It takes time to communicate between cores.
18
Q
What is clock speed?
A
- The maximum number of cycles that the CPU can perform within a second.
19
Q
What is word length/size?
A
- The amount of data that can be handled at one time by the processor.
- i.e. the number of bits that can be transferred from main memory to the CPU at one time.
- Width of data bus = word length.
20
Q
What is bus width?
A
- The number of bits that can be transferred by the bus at one time.
- For the data bus, this is usually equal to the word length.
- For the address bus, this determines the number of bits that can be used to form an address.
21
Q
What is parallel processing and how does it work?
A
- Multiple cores each independently running processes increase the speed of an application.
- This is done by breaking the application down into threads which are executed on separate cores.
- Only applications designed for parallel processing can take advantage of multiple cores.
22
Q
What is pipelining?
A
- Rather than a component staying idle after it has completed its job in the current cycle, the processor loads that component with the instruction for the next cycle.
- This maximizes CPU efficiency as no component stays idle.
- If the application branches and there is an unexpected instruction that needs to be executed, the pipeline is flushed.
- An application with many branches would not be suitable for pipelining.
23
Q
What are the differences between von Neuman and Harvard architecture?
A
- VN has a single memory unit whereas H has separate memory units for data and instructions.
- H has separate buses for data and instructions whereas VN only has one bus for both.
- H is commonly used for embedded systems as applications are hardcoded with a fixed size whereas VN is more suitable for a PC where memory can be dynamically allocated.
