1.1.1 Flashcards
Control unit
Controls and coordinates all activities of the CPU.
Directs flow of data between CPU and other devices.
Arithmetic logic unit (ALU)
Carries out arithmetic and logic calculations.
Arithmetic operations are on fixed and floating point numbers: ADD/ SUBTRACT/ MULTIPLY / DIVIDE
Boolean logic operations: Comparison /AND /OR/ NOT/ XOR
Often uses general purpose registers to temporarily hold results of calculations such as accumulator.
Registers
Are small storage locations used to hold data temporarily.
They have high read and write speeds.
Program counter (PC)
Stores the address of the next instruction.
Has a very close relationship to MAR, at the start of every fetch, decode, execute cycle address held in PC is stored in MAR.
Memory address register (MAR)
Temporarily holds the address of the memory location which needs to be fetched or set from main memory that the processor needs to access.
Memory data register (MDR)
Used to temporarily store data which is read from/ written to memory.
Sometimes known as buffer register (MBR)
All data to and form memory must travel down data bus and pass through MDR.
Current instruction register (CIR)
Area where the current instruction is being carried out. The operation is divided into operand and opcode.
Accumulator
Stores the results of the calculations made by the ALU.
Interrupt register
Generates and detects interrupts.
Assembly code
Uses mnemonics to present instructions, for instance SUB represents subtraction. This is a simplified way of representing machine code, easier to remember than binary.
Assembly code mnemonics
Simplified
Buses
Communication paths between the CPU, memory and other components.
Address bus
A one directional bus that transmits memory addresses that are used as operands in programming instructions, so that data can be retrieved from main memory.
Data bus
A bi-directional path for moving data and instructions between system components.
Control bus
A bi-directional bus to transmit command, timing and specific status information between system components
Control bus
A bi-directional bus to transmit command, timing and specific status information between system components.
Fetch decode execute (FDE)
PC
MAR
Address Bus
Memory
Data bus
MDR
CIR
Decode Uni
Fetch
- The address of the next instruction is copied from the PC to the MAR
- The fetch signal is sent across the control bus. The content of the MAR are transferred across the address bus.
- The contents of the memory location stored in the MAR are sent across the data bus and stored in the CIR
- the PC increments by 1
Decode
- The contents of the CIR are sent to the CU and divided.
The Opcode tells you the instruction to be carried out and the operand stores the address of any data which might be needed. - The operand is sent to the MAR and the data is fetched from memory and stored in the MDR
Execute
The appropriate opcode is carried out on the operand.
How does a program branch happen and what is the result?
Due to an if statement, function, procedure call or loop. Results are that the next instruction held in the PC is not carried out.
Clock speed
Indicates the number of instructions the CPU can process per second, unit is hertz.
The clock speed is determined by the system clock. This is an electronic device which generates signals, switching between 0 and 1.
Advantages and disadvantages of increasing clock speed
you can carry out more instructions in a given time; improved performance
more heat generated meaning computers must be cooled (either with heat sync/fan or water/oil cooling)
Multiple cores
A core is an independent processor, which is able to compile its own fetch-execute cycle.
The more cores a computer has, the more fetch-execute cycle it can carry out at any given time.
Dual-core processor has two processors linked together in the same integrated circuit.
Quad-core computer has four linked processors (each with its own registers, ALU, accumulator and control unit)
Advantages and disadvantages of multiple cores
May speed up processing.
Having double the number of cores in a system doesn’t mean double the performance because some cores could have a lower clock speed due to the temperature and size, so some speed can be lost as cores try to communicate with each other.
Programs are not utilised to take advantage efficiently of this design.
Cache memory
Cache is a small amount of fast memory, which is directly connected to the CPU that can fetch recently used data.
Instructions fetched from main memory are copied to the cache, so if required again, they can be accessed quicker.
As cache is filled up, the unused instructions are replaced to make use of recent data to be made more accessible.
Cache memory advantages and disadvantages
Much quicker to access than main memory (RAM), less time fetching data.
Its expensive.
If the computer is turn off, the data stored in them is not saved it gets destroyed.
Pipelining
Is the process of completing the fetch, decode, and execute cycles of three separate instructions simultaneously, holding appropriate data in a buffer in close proximity to the CPU until it’s required.
While one instruction is being executed, another can be decoded and another fetched.
Advantageous and disadvantageous of pipelining
More efficient meaning it can do the fetch-execute cycle simultaneously.
Pipelined CPU’s works at higher clock frequencies than the RA; increases overall performance.
If you have branching instructions it will make the pipelining inefficient because it would have to flush the instructions.
Designing of the pipelined processor is complex.
The throughput of a pipelined processor is difficult to predict.
Von Neumann
- (Single) Control Unit
- (Single) Arithmetic Logic Unit
- (Special) registers within CPU
- Instructions and Data stored in same area of
memory
Is when memory is shared between instructions and data and they also share the same buses and can only fetch data and instructions at once.
e.g. PC’s and servers.
Harvard
Stores data and instructions in physically separate memory locations.
Instructions and data are each served by their own buses.
e.g. Speech and image processing systems/ Mobile communication systems.
Difference between Harvard and Nuemann
improving computer performance
A newer CPU may have a faster clock speed and so execute more instructions per second. It may have multiple cores and so be able to execute several programs simultaneously (or one in parallel). It may have more cache meaning comparatively slower RAM can be accessed less frequently.
More RAM means more programs can be open simultaneously
without the need to use much slower virtual memory.
- Adding a graphics card will speed up the rendering of 3D graphics as GPU has specialist instructions and can apply the same instruction to multiple pieces of data simultaneously.
- The slower the secondary storage the longer it takes to load files/program/data. A faster secondary storage device can improve this. May choose to use flash memory (i.e. SSD)
- OS makers often release updates and some of these will improve performance.
- Some lighter weight operating systems use fewer system resources allowing the system to devote more to running the user’s applications.
- A fragmented HDD runs slowly as time is spent finding parts of the files. This is reduced by defragmenting and storing the parts of the file contiguously.
- Malware can slow down a computer. Removing it will improve performance.
features not in von nuemann but are in contemporary
Two separate areas of memory…
…one for instructions & one for data./instructions and
data can be accessed concurrently.
Different (sets of) buses…
… one for instructions & one for data./ instructions and
data can be accessed concurrently.
Pipelining…
…whilst an instruction is being executed the next can
be decoded and the subsequent one fetched.
