1.1 The characteristics of contemporary processors, input, output and storage devices Flashcards
Components of a computer and their uses
Control Unit
Directs the operation of the CPU.
It does the following jobs:
- Controls and Coordinates activities of the CPU
- Manages flow of data between CPU and other devices
- Accepts next intruction, decodes it, and stores resulting data back in memory.
Program Counter
- Holds the address of the next instruction to be executed.
Memory Address Register
- Holds the address of the memory location from which data or instruction is to be fetched or to which data is to be written.
- Sends these addresses down the address bus.
Memory Data Register
- Used to temporarily store data which is either read from or written to memory.
- All data to and from memory must travel down the MDR.
Current Instruction Register
Holds the current instruction which is being executed.
- Contents of MDR are copied to CIR if its an instruction.
- Contains Opcode and Operand of the current instruction. (Instruction = Opcode + Operand)
Arithmetic Logic Unit
Performs Arithmetic and Logical operations on data. This can be:
- Arithmetic operations on fixed and floating points (ADD. SUBTRACT, MULTIPLY, DIVIDE)
- Bitwise operations left or right.
- Boolean logic operations (AND, OR, NOT, XOR)
- Often used as general purpose registers to temporarily hold results of caluculations such as Accumulator.
Accumulator
- One of a number of general purpose registers that modern CPU’s have.
- Data or Control info is often stored in them.
- Resuls of calculations carried out in the ALU are stored in the ACC.
General Purpose Registers
- CPU may have many general purpose registers for storing temporary data while instructions or calculations are being carried out.
- More general purpose registers = Faster
The three Buses
- Address Bus - Carried memory address that identify where data is being read from or written to.
- Data Bus - Carries Binary 1’s and 0’s that make up the actual info being transmitted around the CPU/Computer.
- Control Bus - Carries command and control signals to and from every other component of the CPU/Computer.
Fetch, Decode, Execute Cycle
Fetch:
- The PC is checked.
- Address from the PC is copied into the MAR.
- Instruction held at that address is copied into the MDR by the data bus.
- Simultaneously, the contents of the PC are increased by 1.
- The value held in the MDR is copied into the CIR.
Decode:
- The contents of the CIR are split into Operand and Opcode
Execute:
- CIR sends the data to the MAR
- MAR will send the address down the address bus to the main memory.
- As we want to read the data in the MAR, the CU will send read signals along the control bus to the main memory.
- The contents stored in the memory can be sent along the data bus to the MDR.
- They are then coppied into the ACC, completing the instruction.
Pipelining
- Pipelining is the process of completing the FDE cycle of three separate instructions simultaneously, while holding appropriate data in a buffer in close proximity to the CPU until it is required. While one instruction’s being executed, another can be decoded, and another can be fetched.
- Pipelining is aimed to reduce the amount of the CPU which is kept idle.
Processor Pipelining is often divided into: - Instruction: Consists of stages in which an instruction is moved through the processor, including: it being fetched, buffered and executed.
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Arithmetic: Represents parts of the Arithmetic operation that can be broken down and overlapped as they’re performed.
Pipelining is now common in micro-processors used in computers.
Factors which affect the performance of the CPU
- Clock speed - measured in GHz, the more there are, the higher number of instructions fetched per second.
- Cache size - Quicker to access than the main memory.
- Number of cores - In some cases, the more cores the better. However more cores may have power to run multiple programs, it takes time for them to communicate with eachother and many programs aren’t designed for multiple cores.
Von Neumann Architecture
- Shared memory space for instructions and data.
- Instructions and data are stored in the same format.
- A single control unit or processor follows a linear FDE cycle.
- One instruction is completed at a time.
- Registers are used as fast access to instructions and data.
Harvard Architecture
- Instructions and data are stored in separate memory units.
- Each has its own bus.
- Reading and writing data can be done at the same time as fetching an instruction.
- Used by RISC processors.
Examples of contemporary architectures
- SIMD (Single Instruction Multiple Data - Parallel processing carries out a single instruction on multiple data items at the same time - often used by graphic processors.
- MIMD - Multiple Instructions Multiple Data - Multiple instructions carried on multiple data items across several cores.
- Distributed Computing - Multiple computers on a shared network each take on parts of a bigger problem. This can be done on a grand scale over the internet such as (NASA’s SEIT@Home initiative)
