1.1 - The characteristics of contemporary processors, input, output and storage devices Flashcards

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1
Q

What does the Arithmetic Logic Unit (ALU) do?

A

It is the problem solving part and performs arithmetic, logical + shift operations on data. The results are stored in registers.

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2
Q

What are the 4 arithmetic operations?

A

AND, OR, NOT, XOR. (Boolean Logic Operations)

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3
Q

What are shift operations?

A

Bits are moved left or right in a register.

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4
Q

What is the Central Processing Unit (CPU)?

A

It is the brain of the computer, it does all the calculations & processes instructions.

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5
Q

What are registers?

A

Several locations of superfast memory to temporarily store results. Small memory cells that operate at a very high speed. They are used to temporarily store data and all arithmetic, logical and shift operations occur in these
registers.

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6
Q

What are the 5 special purpose registers?

A
  • Program Counter (PC).
  • Current Instruction Register (CIR).
  • Memory Address Register (MAR).
  • Memory Data Register (MDR).
  • Accumulator (ACC)
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7
Q

What does the PC do?

A

It holds the memory address of the next instruction to be executed.

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8
Q

What does the CIR do?

A

It holds the current instruction and splits it into Opcode + Operand.

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9
Q

What does the MAR do?

A

It holds the address in memory where the processor is required to fetch/store date to/from.

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10
Q

What does the MDR do?

A

It temporarily holds data moving between the processor and main memory.

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11
Q

What does the ACC do?

A

It holds intermediate results of an instruction.

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12
Q

What 3 things need to be held in order for a instruction to be executed?

A
  • Current instructions must be temporarily held by the processor before being executed.
  • The address of the data + the actual data must be held.
  • The address of the next instruction being executed must also be held.
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13
Q

What happens if a computer has more cores?

A

It is faster.

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14
Q

What are the 5 things the Contol Unit (CU) does?

A
  • It controls & coordinates all the activities of the CPU.
  • Managing the flow of data between the CPU and other devices.
  • Accepting the next instruction.
  • Decoding instructions.
  • Storing the resulting data back in memory.
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15
Q

What are Buses?

A

A series of connectors that transfer signals between internal components. Transferring of data.

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16
Q

What is the System Bus?

A

It is 3 seperate buses carrying control signals, addresses + data.

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17
Q

How are control signals transported?

A

Control signals are sent along the control bus between the CU and other components.

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18
Q

What is memory read?

A

Data from the addressed location in RAM is placed on the data bus.

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19
Q

What is memory write?

A

Data on the data bus is written to the addressed locations in RAM.

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20
Q

What is bus request?

A

It Indicates a device is requesting to use the data bus

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21
Q

What does the clock do?

A

It synchronises operations

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22
Q

What are the 2 features of the data bus?

A
  • This is a bi-directional bus (meaning bits can be carried in both directions). - This is used for transporting data and instructions between components.
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23
Q

What are 2 features of the address bus?

A
  • Transmits the memory addresses specifying where data is to be sent to or retrieved from.
  • The width of the address bus is proportional to the number of
    addressable memory locations.
    e.g 8 bit address bus -> maximum number of memory addresses = 2(∧8) = 256
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24
Q

What are 2 features of the control bus?

A
  • bi-directional bus used to transmit control signals between internal and external components.
  • The control bus coordinates the use of the address and data buses and
    provides status information between system components.
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25
Q

What is bus grant?

A

It indicates the CPU has granted access to the data bus.

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26
Q

How are instructions represented in assembly code?

A
  • In mnemonics, e.g. ADD = addition. It is a simplified way of representing machine code.
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27
Q

How is the CIR involved in assembly code instructions?

A
  • The instruction is divided into operand and opcode in the CIR.
    -The operand contains the data or the address of the data upon which the operation is to be performed.
  • The opcode specifies the type of instruction to
    be executed
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28
Q

What is the Fetch-Execute cycle?

A
  • Processors operate in defines stages that are used to carry out program instructions.
  • The process is repeated for each instruction in a program.
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29
Q

What are the 4 stages of the fetch stage?

A
  1. The address of the next instruction is copied from the PC to the MAR.
  2. The instructions held at that addressare copied to the MDR.
  3. Simulaneously the contents of the PC are incremented.
  4. The contents at the MDR are copied to the CIR.
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30
Q

What happens during the decode stage?

A
  1. The instructions held at the CIR are decoded.
  2. It is split into oerand and opcode to determine the type of instruction it is. Additional data, if required, is fetched from memory.
  3. And passed to the ACC:
    a. The opcode specifies the operation that is to be
    performed.
    b. The operamd holds either the address of the data to be used (then copied to the MAR) or actual data to be operated on and then passed on to MDR (Memory data register)
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31
Q

What happens during the execute stage?

A
  1. Instruction is executed and the result is held in the ACC or stored in memory.
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32
Q

What is the summed up explanation of the Fetch-Execute cycle?

A

Stage 1: Fetch(Instructions) -> MAR -> MDR -> PC(+1) -> CIR
Stage 2: Decode -> CIR(Decoded) -> Split into opcode/operand -> ACC
Stage 3: Execute -> AC Memory (Stored)
REPEAT

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33
Q

What determines the format of machine code instructions?

A

The architecture of a computer and the type of processor. (including word size + width of the address bus)

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34
Q

How is machine code represented?

A

In hexadecimal.

35
Q

How are assembly language and machine code similar?

A

There is a one to one correspondence between a machine code instruction -> the assembly language equivelent.

36
Q

What 3 factors affect the performance of the CPU?

A
  • Clock Speed.
  • No. cores.
  • Amount & type of cache memory.
37
Q

How does clock speed affect performance of the CPU?

A
  • Faster speed = more instructions processed per second = faster computer.
  • FDE cycle is triggered by clock pulses. Clock can change state billions of times per second. (4GHz = 4 billion times per second)
  • Regular ON/OFF signals synchronise operations of processor components.
  • Actions usually carried out on rising edge of the clock + take a fixed number of cycles to complete.
38
Q

What is clock speed?

A
  • The clock speed is determined by the system clock. This is an electronic device which generates signals, switching between 0 and 1.
  • All processor activities begin on a clock pulse, and each CPU operation starts as the clock changes from 0 to 1.
  • **The clock speed is the time taken for one clock cycle to complete. **
39
Q

What is a cores?

A
  • A core is an independent processor that is able to run its own fetch-execute cycle.
40
Q

How do cores affect performance of the CPU?

A
  • A computer with multiple cores can complete more than one fetch-execute cycle at any given time.
  • A computer with dual cores can theoretically complete tasks twice as fast as a computer with a single core. However, not all programs are able to utilise multiple cores efficiently as they have not been designed to do so, so this is not always possible.
  • As the FDE cycle is happening each each core, a different instruction will be happening at the same time in each one.
41
Q

What is parrallel/Concurrent processing?

A

When several processor cores are working at the same time. Each core can work concurrently or on a different part of the same take. But some instructions are processed sequentially so not always possible.

42
Q

What is cache memory?

A
  • Small, superfast, expensive memory. Stores data/instructions recently used by the processor.
  • Instructions fetched from main memory are copied to the cache, so if required again, they can be accessed quicker. As cache fills up, unused instructions are replaced.
  • Quick to access as closer to the CPU than e.g. RAM.
43
Q

What are the different levels of cache memory?

A
  • Level 1 = is the smallest level (less than a megabyte) but it is also the fastest.
  • Level 2 = is larger than level 1 (up to 8 megabytes) but slightly slower.
  • Level 3 = is located outside of the CPU core which makes it slower than the first two levels but it is much larger (up to 50 megabytes).
44
Q

What process do you follow in order to store in cache memory?

A

First the CPU will look in level 1, then level 2, then level 3. If data is found then it is a ‘cache hit’ if not it is a ‘cache miss’ and computer will have to look in RAM

45
Q

How does cache improve memory performance?

A
  • Cache memory is closer to the CPU than RAM, meaning that it can provide data and instructions to the CPU at a faster rate.
  • A computer with more cache memory (e.g. 8MB instead of 4MB) should have a higher performance because repeatedly used instructions can be stored and accessed faster.
  • Larger level 1 and level 2 cache sizes will improve a computer’s performance as data can be accessed extremely quickly.
46
Q

What are the 2 limitations of cache memory?

A
  • Expensive; so most computers only have a small amount.
  • Multiple cache misses = data latency (delay) as information is accessed from RAM (Further away from the CPU).
47
Q

What is overclocking?

A
  • Computers speed is increased higher than the recommended amount.
  • Computer performs faster but can cause overheating and damage the machine.
48
Q

What is underclocking?

A
  • When the computers speed is decreased lower than the recommended amount.
  • Computer performs slower but lifespan is increased.
49
Q

What are the limitations of having more cores?

A
  • If one core waits for another core to finish processing, performance may not increase at all.
  • some software isn’t written to utilise multiple cores, so it will not run faster on a multi core computer.
50
Q

What is pipelining?

A
  • Technique to improve performance as it efficiently uses multiple cores/processors to perform different stages of the FDE cycle at the same time.
  • An instruction enters the pipeline + once one stage is completed another instruction enters the pipleine so 3rd instruction enters before 1st + 2nd is completed.
51
Q

What are the limitations of pipelining?

A

Certain instructions may not be able to be executed unless others have been fetched/decoded. Waiting for this may affect performance.

52
Q

What is the stored program concept?

A
  • Program loaded into main memory to be executed by the processor
  • Instructions fetched 1 by 1 + decoded + executed sequentially by the processor.
  • Sequence of instructions only changed by Conditional/unconditional jump instruction.
53
Q

How did early multipurpose machines work?

A

Early computers calculated an output using fixed instructions + only one set of instructions performed.

54
Q

What is Von Neumann architecture?

A
  • common implementation of store program concept.
  • Instructions + data stored in common main memory + transferred using single shared bus.
55
Q

What is Harvard architecture?

A
  • Alternate model; seperates data + instructions into seperate memories using different buses so program instructions + data no longer compete for the same bus.
  • Different sizeed memories + word lengths can be used for data + instructions.
56
Q

When is harvard architecture used?

A

Used with specialist embedded signals + digital signal processing (DSP)

57
Q

What are the 3 advantages of Von Neumann architecture?

A

+ All general purpose computers based on von neumann’s principals due to cost & programming.
+ Simplified design of CU.
+ Data from memory + devices accessed in the same way.

58
Q

What are the 4 characteristics of Von Neumann architecture?

A
  • Used in PCs, Laptops, servers + high performance computers.
  • Data + instructions share same memory & both use the same length.
  • One bus for data + instructions is a bottleneck.
  • One bus is simple for CU design.
59
Q

What are the 4 characteristics of Harvard architecture?

A
  • Used in DSP, micorcontrollers, embedded systems.
  • Data + Instructions don’t share same memory so can use different word length. Free data memory can’t be used for instructions vice versa.
  • Seperate buses allow parallel access to data + instructions.
  • CU for 2 buses = more complicated + expensive.
60
Q

What is comtempory processor architecture?

A
  • Modern CPU chips incorporate parts of both architectures.
  • In desktop computers; one mainn memory for holding data + instructions but cache memory is divided in instruction cache + data cache. Data + instructions retrieved using harvard architecture.
  • Some Digital signal proccessing (DSP) have multiple parallel data buses + one instruction bus.
61
Q

What does CISC stand for?

A

Complex instruction set computer

62
Q

What does CISC do?

A
  • Large instruction set used to accomplish tasks in as few lines of assembly code as possible.
  • combines a ‘load/store’ instruction with instruction carrying out actual calculation.
  • e.g. single assmbly instruction MULT A, B = multiply A by B and store result in A.

Large instruction set = more than 1 instruction in 1 line of code.

63
Q

What does RISC stand for?

A

Reduced instruction set computer

Opposite approach to CISC

64
Q

How does a RISC work?

A
  • Minimum no. very simple instructions. Each take 1 clock cycle & used to acomplish all required operations in multiple general purpose registers.
65
Q

What are the 3 advantages of CISC?

A
  • Quicker to code programs.
  • Compiler has little work to do to translate high-level language statement -> machine code.
  • As code = short; little RAM is needed to store instructions.
66
Q

What are the 3 advantages of RISC?

A
  • Hardware is simpler to build - fewer circuits to carry out complex instructions.
  • Pipelining is possible as each instruction takes the same time.
  • RAM is now cheap + RISC use of RAM & software allows better performance processors at less cost.
67
Q

How do multi-core processors work?

(Parallel Systems)

A

Workload distributed across multiple processor cores achieving significantly higher performance as several tasks are performed in parallel.
E.g. Covid 19 Scientists creating a vacine.

  • Software has to be written to take advantage of multiple cores
  • e.g. google chrome -> runs several concurrent processes. In tabbed browsing - different cores work simultaneoysly processing requests.
68
Q

Where are multi-core processors used?

A
  • Personal computers / mobile devices = dual / quad core = 2/4 processing chips.n
  • Supercomputers = 1000’s of processing chips.
69
Q

What is a Co-processor?

A
  • Extra processor to supplement functions of the CPU (primary processor)
70
Q

What can a Co-processor be used for?

A
  • Perform floating point arithmetic, graphics processing, digital signal procesing (DSP).
  • Carries out a limited range of functions.
71
Q

What is the Graphics processing unit (GPU)?

A
  • Specialised electronic circuit & efficient at manipulating computer graphics + image processing.
72
Q

What are the 5 characteristics of the GPU?

A
  • Has thousands of small efficient cores designed for parallel processing.
  • In a PC the GPU can be on a graphics card.
  • A CPU = multiple cores. A GPU = thousands of cores.
  • Acts with the CPU to accelerate scientific, engineering + other applications. Needed together for gaming computers + AI.
  • Used in numerous devices. E.g. mobile phones, robots, drones + cars.
73
Q

What are some example RISC instructions?

A
  • LDA (load)
  • STO (Store)
  • MULT (Multiply)
74
Q

What are the 5 control signals?

A
  • Memory Read.
  • Memory Write.
  • Bus Request.
  • Bus Grant.
  • Clock.
75
Q

What are the 3 steps in a 2D scanner working?

A
  1. Panel is raised, document placed on glass and cover is closed. Bright light illuminates document.
  2. Scan Head moves across doc until whole page scanned & image is produced.
  3. Image is focused and dalls on a CCD + converted to electronic form.
76
Q

How does a 3D scanner work?

A
  • Scans solid images produsing three dimensional image.
  • many images taken a 3D coordinates of the object by the scanner.
77
Q

Explain a Barcode reader

A
  • series of dark & light parallel lines of varying thickness.
  • Numbers 0-9 represented by unique series of lines.
  • UPC (Universal Product Code) defines a standard to represent each digit using bars.
  • Commonly used to store product information.
  • Normally only stores 30 digits.
78
Q

What are the 4 steps in a Barcode working?

A
  1. Barcode read by red LED or laser.
  2. Light reflected back off the barcode. (Dark areas, no light reflected).
  3. After scanning, pattern is generated + converted to digital data.
  4. Data identifies e.g. stock item, details sent to POS.
79
Q

Explain a QR code reader?

A
  • QR code = matrix of filled in squares on light background.
  • Stores up to 7000 digits.
  • Can be scanned anywhere (needs network)
  • Commonly used for advertising.
  • Contains web link.
80
Q

What are the 3 steps in a QR code reader working?

A
  1. Scanned using phone’s camera.
  2. Analysed (requires internet or network).
  3. web link / advert appears on smart device’s screen.
81
Q

Why have digital cameras replaced traditional cameras?

A
  • Traditional: require film, photos have to be developed/printed.
  • Digital: connect to computers via USB, Wi-fi, Bluetooth, videos/photos transferred in seconds. Unwanted photos/videos can be deleted.
82
Q

How do the aspects of a digital camera work?

A
  • micorprocessor automatically adjusts shutter speed, focuses the image, operates the flash, adjusts aperture size, size of image, removes red eye etc.
  • No. of pixels in light sensitive cell = amount of memory photo occupies.
  • memory of photo reduced by reducing resolution
83
Q

How does a keyboard work?

A
  • every character has unique ASCII code.
  • Key is pressed + converted into digital signal which computer interprets.
  • frequent use leads to RSI (repetitive Strain Injury).
  • Ergonomic keyboards overcome problem and support user’s hand + wrists.
84
Q
A