1.1 systems architecture Flashcards
CPU
central processing unit - the main part of the computer, consisting of the registers, ALU and control unit
Fetch - decode - execute cycle
the complete process of retrieving an instruction from storage, decoding it and carrying it out
ALU (arithmetic logic unit)
performs calculations and logic comparisons in the CPU
CU - control unit
decode instructions. sends signals to control how data moves around the CPU
Cache
memory in the processor that provides fast access to frequently used instruction and data
Register
tiny areas of extremely fast memory located in the CPU, normally designed for a specific purpose where data or control information is stored temporarily - e.g., MAR MDR, ect.
Von Neuman architecture
traditional computer architecture that forms the basis of most digital computer systems. instructions are fetched, decoded and executed one at a time
MAR -memory address register
holds the address of ready to be used by the memory data register or the address of an instruction passed from the program counter. Step two of the FDE cycle
MDR - memory data register
holds data fetched from or to be written into memory. Step 3 of the FDE cycle
program counter
holds the address of the next instruction to be executed. Step 1 of the FDE cycle
accumulator
holds the result of calculations
clock speed
measured in hertz, the clock speed is the frequency at which the internal clock generates pulses. The higher the clock rate, the faster the computer may work
cache size
the larger the cache, the more data that can be stored without having to go back to main memory (RAM)
cores
part of a multi - core processor, a single component with two or more independent CPUs the facilitate the FDE cycle
embedded systems
a computer built to solve a highly specific problem. Not easy to change. For example the operating system placed inside a washing machine, microwave or set of traffic lights
