1.1 System Architecture Flashcards
Central processing unit(CPU)
Decodes and Executes instructions
Von Neumann Architecture
Instructions are fetched, decoded and executed one at a time
Instructions and data are held together in the same memory space
Memory Address Register (MAR)
Holds the address of data ready for by the memory data register.
Or the address of an instruction passed from the program count.
Memory data register(MDR)
Holds the data fetched from or to be written to the memory.
Program counter(PC)
Holds the address of the next instruction.
Accumulator(ACC)
Holds the result of the calculations.
Arithmetic logic unit (ALU)
Performs calculations e.g. x= 2+3
And logical comparisons e.g. IF x > 3
In the CPU
Control unit(CU)
Decodes instructions.
Sends signals to control how data moves around the CPU
Cache
Memory in the processor providing fast access to frequently used instructions and data
Factors affecting the speed of the CPU
Clock speed
Number of cores
Cache size
Embedded system
A computer system within a larger mechanical or electrical system designed for specialist purpose
Example: Washing machine
Example: Engine manage system
The order that the registers are used in the von Neumann Fetch, Decode, Execute cycle
To fetch an instruction: Program Counter to the... Memory Address Register to the... Memory Data Register. Decode may then require data so repeat steps 2 and 3. Results of calculations are stored in the accumulator.
