1.1 System Architecture Flashcards

1
Q

What is a register

A

A piece of memory in the CPU that does one task

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2
Q

What does CPU mean

A

Central processing unit

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3
Q

What cycle does the CPU do

A

Fetch decode execute cycle

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4
Q

What concept did Von Neumann come up with

A

Stored program concept

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5
Q

What is the Von Neumann “stored program concept”

A

A program and its data are stored in RAM

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6
Q

Why is the stored program concept so important

A

Because the CPU can’t access secondary storage

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7
Q

What is an embedded system

A

A computer, built into a larger system, that performs 1 specific task

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8
Q

What are the 3 CPU components

A

Arithmetic logic unit (ALU)
Control unit (CU)
Cashe

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9
Q

What are the 4 CPU registers

A

Program counter (PC)
Memory address register (MAR)
Memory data register (MDR)
Accumulator (Acc)

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10
Q

What is the main purpose of the CPU

A

Fetch decode execute cycle

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11
Q

What is the purpose of the program counter

A

Tracks the RAM address of the next instruction

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12
Q

What is the purpose of the Memory address register

A

Stores the RAM address of the next instruction

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13
Q

What is the memory data register

A

Stores instructions transferred from RAM

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14
Q

What is the purpose of the Accumulator

A

Stores the result of mathematical/ logical calculations

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15
Q

What is the purpose of the arithmetic logic unit

A

Performs all arithmetic/logic calculations in the CPU.

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16
Q

What is the purpose of the control unit

A

Fetches, decodes, and executes.
Moves data
Controls hardware

17
Q

What is the job of the cache

A

located very close to the CPU, stores frequently accessed data and instructions

18
Q

What are the 3 Cs that effect CPU performance

A

Clock speed
Cache size
Core number

19
Q

How does clock speed effect CPU performance

A

Fetch, decode, execute cycles can be completed faster

20
Q

How does cache size effect CPU performance

A

Less time processor has to wait for instructions to be fetched

21
Q

How does core number effect CPU performance

A

More fetch, decode, execute cycles can be completed at once